Effect of Electrode Nanopatterning on the Functional Properties of Ta/TaO_x/Pt Resistive Memory Devices

Embedded, low-power, fast nonvolatile memory is considered to be a viable approach to improving the performance of computing systems designed for real-time processing of the incoming information stream. Among different nonvolatile memory concepts, resistive random access memory is one of the competitive candidates because of the combination of functional properties, such as the energy per writing cycle, speed, number of switching cycles (endurance), and retention time. In this work, we explore the effect of nanopatterning of the Pt bottom electrode (BE) to control the formation, number, and size of conductive filaments in the TaOx layer in Ta/TaOx/Pt resistance switching (RS) devices integrated with field-effect transistors (the one transistor and one resistor concept). Patterning is achieved by either etching “holes” in the Pt BE or growth of Pt “pillars” on top of a flat continuous underlayer. Such nanopatterned RS devices reveal lower (∼1.2 vs ∼2.5 V) electroforming voltages and ∼102 times lower currents in the ON state compared to those with a nonpatterned Pt electrode, while exhibiting more than 105 switching cycles without any degradation as well as better device-to-device and cycle-to-cycle repeatability of electrical characteristics. The modeling of the electric-field distribution across the functional TaOx layer reveals the edge of Pt nanopillars as the most probable area for filament formation. The elemental mapping during transmission electron microscopy analysis of the patterned Ta/TaOx/Pt RS device cross section confirms that the thickness of the TaOx layer on top of the Pt “pillar” is minimal at the inclined edge. The conducting atomic force microscopy current mapping of two patterned RS devices upon electroforming and removal of the top electrode in high- and low-resistance states confirms a single conducting channel formed at the edge of the Pt electrode.