journal article·2019-06-13Open access

2D materials as semiconducting gate for field-effect transistors with inherent over-voltage protection and boosted ON-current

Qingkai Qian, Jiacheng Lei, Jin Wei, Zhaofu Zhang, Gaofei Tang, Kailun Zhong, Zheyang Zheng, Kevin J. Chen

Abstract

Abstract Various 2D/3D heterostructures can be created by harnessing the advantages of both the layered two-dimensional semiconductors and bulk materials. A semiconducting gate field-effect transistor (SG-FET) structure based on 2D/3D heterostructures is proposed here. The SG-FET is demonstrated on an AlGaN/GaN high-electron mobility transistor (HEMT) by adopting single-layer MoS2 as the gate electrode. The MoS2 semiconducting gate can effectively turn on and turn off the HEMT without sacrificing the subthreshold swing and breakdown voltage. Most importantly, the proposed semiconducting gate can deliver inherent over-voltage protection for field-effect transistors (FETs). Furthermore, the self-adjustable semiconducting gate potential with drain bias can even boost the ON-current while guaranteeing the safe operation of FET. In implementing the semiconducting gate, the layered two-dimensional materials such as the adopted MoS2 have several important benefits such as the feasibility of high-quality crystals on different gate dielectrics and the good controllability of semiconducting gate depletion threshold voltage by the layer thickness. The demonstrated semiconducting gate as over-voltage protection for HEMT can be extended to other FETs, which can become another advantageous arena for the possible applications of the layered two-dimensional materials.
Source: crossref · Quality: baseline

Research context

OpenAlex topics: 2D Materials and Applications · Ga2O3 and related materials · Graphene research and applications

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

References (45)

Show source-provided references
1. Radisavljevic, B., Radenovic, A., Brivio, J., Giacometti, V. & Kis, A. Single-layer MoS2 transistors. Nat. Nanotechnol. 6, 147–150 (2011).10.1038/nnano.2010.279 ↗
2. Sachid, A. B. et al. Monolithic 3D CMOS using layered semiconductors. Adv. Mater. 28, 2547–2554 (2016).10.1002/adma.201505113 ↗
3. Nomura, K. et al. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature 432, 488–492 (2004).10.1038/nature03090 ↗
4. Carter, R. et al. 22 nm FDSOI technology for emerging mobile, Internet-of-Things, and RF applications. IEDM Tech. Dig. 2016, 2.2.1–2.2.4 (2016).
5. Tang, J. et al. Flexible CMOS integrated circuits based on carbon nanotubes with sub-10 ns stage delays. Nat. Electron. 1, 191–196 (2018).10.1038/s41928-018-0038-8 ↗
6. Huang, X., Liu, Z., Li, Q. & Lee, F. C. Evaluation and application of 600 V GaN HEMT in cascode structure. IEEE Trans. Power Electron. 29, 2453–2461 (2014).10.1109/TPEL.2013.2276127 ↗
7. Hamada, K., Nagao, M., Ajioka, M. & Kawai, F. SiC—emerging power device technology for next-generation electrically powered environmentally friendly vehicles. IEEE Trans. Electron Devices 62, 278–285 (2015).10.1109/TED.2014.2359240 ↗
8. Zafar, S. et al. A comparative study of NBTI and PBTI (charge trapping) in SiO2/HfO2 stacks with FUSI, TiN, Re gates. VLSI Symp. Tech. Dig. 2006, 23–25 (2006).
9. Lagger, P., Ostermaier, C., Pobegen, G. & Pogany, D. Towards understanding the origin of threshold voltage instability of AlGaN/GaN MIS-HEMTs. IEDM Tech. Dig. 2012, 13.1.1–13.1.4 (2012).
10. Lee, J., Cho, I., Lee, J. & Kwon, H. Bias-stress-induced stretched-exponential time dependence of threshold voltage shift in InGaZnO thin film transistors. Appl. Phys. Lett. 93, 093504 (2008).10.1063/1.2977865 ↗
11. Lelis, A. J. et al. Time dependence of bias-stress-induced SiC MOSFET threshold–voltage instability measurements. IEEE Trans. Electron Devices 55, 1835–1840 (2008).10.1109/TED.2008.926672 ↗
12. Lin, C., Chou, M., Kang, T. & Wu, S. Electrical characteristics and TDDB breakdown mechanism of N2-RTA-treated Hf-based high-k gate dielectrics. Microelectron. Eng. 88, 950–958 (2011).10.1016/j.mee.2010.12.028 ↗
13. Linder, B. P., Lombardo, S., Stathis, J. H., Vayshenker, A. & Frank, D. J. Voltage dependence of hard breakdown growth and the reliability implication in thin dielectrics. IEEE Electron Device Lett. 23, 661–663 (2002).10.1109/LED.2002.805010 ↗
14. Wu, E. Y. & Suñé, J. Power-law voltage acceleration: a key element for ultra-thin gate oxide reliability. Microelectron. Reliab. 45, 1809–1834 (2005).10.1016/j.microrel.2005.04.004 ↗
15. Types of electrical overstress protection. ON Semiconductor AND9009/D https://www.onsemi.com/pub/Collateral/AND9009-D.PDF (2014).
16. Wang, Z., Shi, X., Tolbert, L. M., Wang, F. & Blalock, B. J. A di/dt feedback-based active gate driver for smart switching and fast overcurrent protection of IGBT modules. IEEE Trans. Power Electron. 29, 3720–3732 (2014).10.1109/TPEL.2013.2278794 ↗
17. Kwan, A. M. H. & Chen, K. J. A gate overdrive protection technique for improved reliability in AlGaN/GaN enhancement-mode HEMTs. IEEE Electron Device Lett. 34, 30–32 (2013).10.1109/LED.2012.2224632 ↗
18. Chen, T. & Ker, M. Investigation of the gate-driven effect and substrate-triggered effect on ESD robustness of CMOS devices. IEEE Trans. Dev. Mater. Reliab. 1, 190–203 (2001).10.1109/7298.995833 ↗
19. Sahin, H. et al. Anomalous Raman spectra and thickness-dependent electronic properties of WSe2. Phys. Rev. B 87, 165409 (2013).10.1103/PhysRevB.87.165409 ↗
20. Mak, K. F., Lee, C., Hone, J., Shan, J. & Heinz, T. F. Atomically thin MoS2: a new direct-gap semiconductor. Phys. Rev. Lett. 105, 136805 (2010).10.1103/PhysRevLett.105.136805 ↗
21. Chiu, M. et al. Determination of band alignment in the single-layer MoS2/WSe2 heterojunction. Nat. Commun. 6, 7666 (2015).10.1038/ncomms8666 ↗
22. Chuang, H. et al. High mobility WSe2 p- and n-type field-effect transistors contacted by highly doped graphene for low-resistance contacts. Nano Lett. 14, 3594–3601 (2014).10.1021/nl501275p ↗
23. Kang, K. et al. High-mobility three-atom-thick semiconducting films with wafer-scale homogeneity. Nature 520, 656–660 (2015).10.1038/nature14417 ↗
24. Bernardini, F., Fiorentini, V. & Vanderbilt, D. Spontaneous polarization and piezoelectric constants of III–V nitrides. Phys. Rev. B 56, 10024–10027 (1997).10.1103/PhysRevB.56.R10024 ↗
25. McDonnell, S. et al. HfO2 on MoS2 by atomic layer deposition: adsorption mechanisms and thickness scalability. ACS Nano 7, 10354–10361 (2013).10.1021/nn404775u ↗
26. Lee, C. et al. Anomalous lattice vibrations of single- and few-layer MoS2. ACS Nano 4, 2695–2700 (2010).10.1021/nn1003937 ↗
27. English, C. D., Shine, G., Dorgan, V. E., Saraswat, K. C. & Pop, E. Improved contacts to MoS2 transistors by ultra-high vacuum metal deposition. Nano Lett. 16, 3824–3830 (2016).10.1021/acs.nanolett.6b01309 ↗
28. Chen, M. et al. TMD FinFET with 4 nm thin body and back gate control for future low power technology. IEDM Tech. Dig. 2015, 32.2.1–32.2.4 (2015).
29. Zhao, P. et al. 2D layered materials: from materials properties to device applications. IEDM Tech. Dig. 2015, 27.3.1–27.3.4 (2015).
30. Eichfeld, S. M. et al. Highly scalable, atomically thin WSe2 grown via metal–organic chemical vapor deposition. ACS Nano 9, 2080–2087 (2015).10.1021/nn5073286 ↗
31. Jeon, J. et al. Layer-controlled CVD growth of large-area two-dimensional MoS2 films. Nanoscale 7, 1688–1695 (2015).10.1039/C4NR04532G ↗
32. Zhang, W. et al. High-gain phototransistors based on a CVD MoS2 monolayer. Adv. Mater. 25, 3456–3461 (2013).10.1002/adma.201301244 ↗
33. Yu, L. et al. High-performance WSe2 complementary metal oxide semiconductor technology and integrated circuits. Nano Lett. 15, 4928–4934 (2015).10.1021/acs.nanolett.5b00668 ↗
34. Das, S., Chen, H., Penumatcha, A. V. & Appenzeller, J. High performance multilayer MoS2 transistors with scandium contacts. Nano Lett. 13, 100–105 (2013).10.1021/nl303583v ↗
35. Sangwan, V. K. et al. Low-frequency electronic noise in single-layer MoS2 transistors. Nano Lett. 13, 4351–4355 (2013).10.1021/nl402150r ↗
36. Park, W. et al. Oxygen environmental and passivation effects on molybdenum disulfide field effect transistors. Nanotechnology 24, 095202 (2013).10.1088/0957-4484/24/9/095202 ↗
37. Qian, Q. et al. Enhanced dielectric deposition on single-layer MoS2 with low damage using remote N2 plasma treatment. Nanotechnology 28, 175202 (2017).10.1088/1361-6528/aa6756 ↗
38. Azcatl, A. et al. MoS2 functionalization for ultra-thin atomic layer deposited dielectrics. Appl. Phys. Lett. 104, 111601 (2014).10.1063/1.4869149 ↗
39. Ma, N. & Jena, D. Charge scattering and mobility in atomically thin semiconductors. Phys. Rev. X 4, 011043 (2014).
40. Yu, Z. et al. Realization of room-temperature phonon-limited carrier transport in monolayer MoS2 by dielectric and carrier screening. Adv. Mater. 28, 547–552 (2016).10.1002/adma.201503033 ↗
41. Seo, S., Jung, E., Chae, H. & Cho, S. M. Optimization of Al2O3/ZrO2 nanolaminate structure for thin-film encapsulation of OLEDs. Org. Electron. 13, 2436–2441 (2012).10.1016/j.orgel.2012.07.007 ↗
42. Allain, A., Kang, J., Banerjee, K. & Kis, A. Electrical contacts to two-dimensional semiconductors. Nat. Mater. 14, 1195–1205 (2015).10.1038/nmat4452 ↗
43. Li, S. et al. Thickness scaling effect on interfacial barrier and electrical contact to two-dimensional MoS2 layers. ACS Nano 8, 12836–12842 (2014).10.1021/nn506138y ↗
44. Li, L. et al. Black phosphorus field-effect transistors. Nat. Nanotechnol. 9, 372–377 (2014).10.1038/nnano.2014.35 ↗
45. Wang, Y. et al. Field-effect transistors made from solution-grown two-dimensional tellurene. Nat. Electron. 1, 228–236 (2018).10.1038/s41928-018-0058-4 ↗