journal article·2024-10-21

Design of SEE-Tolerant analog switch chip with a novel diode structure *

Wei Huang, HongXia Liu, Qing Xu

Nanotechnology· Volume 35· Issue 43
Publisher page

Abstract

Abstract This paper proposes a novel circuit-level design in order to enhance the radiation tolerance of an analog switch integrated circuit. After analyzing the mechanisms of single-particle sensitivity in a high-voltage analog switch chip fabricated using a commercial 1 μm complementary metal–oxide–semiconductor process, a diode unit was employed to reduce the V GS (voltage between the gate and the base) of the parasitic triode within the metal–oxide–semiconductor field-effect transistor of the switch. This reduction lowered the probability of activating the parasitic triode in response to single-event effect (SEE). Subsequently, single-particle irradiation experiments proceeded with the high-voltage analog switch chip, both with and without the diode unit. In the unreinforced device, the current of the power supply reached 100 mA within 11 s of single-particle irradiation at 75.8 MeV•cm2 mg−1. In contrast, in the reinforced device, the current of the power supply remained relatively stable under irradiation at both 37.2 and 75.8 MeV•cm2 mg−1. These findings indicate that the reinforced analog switch chip exhibits an SEE tolerance exceeding 75.8 MeV•cm2 mg−1, highlighting its potential to enhance the radiation tolerance of analog switches.
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Research context

OpenAlex topics: Radiation Effects in Electronics · Advancements in Semiconductor Devices and Circuit Design · Semiconductor materials and devices

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

References (19)

Show source-provided references
1. Total-ionizing-dose effects in modern CMOS technologies10.1109/TNS.2006.885952 ↗
2. Study on the guard rings for latchup prevention between HV-PMOS and LV-PMOS in a 0.15 μm BCD process
3. Robustness enhancement of the floating NBL BCD architecture: parasitics suppression and addition of partially isolated diode for localized voltage control
4. Management of parasitic bipolars in modular high power LDMOS technology10.1109/ESSDERC.2016.7599646 ↗
5. Development of a robust 50 V 0.35 µm based smart power technology using trench isolation
6. Design and offline testing of a resonant stripline beam position monitor for the IRFEL project at NSRL10.1007/s41365-020-00778-7 ↗
7. Analysis of angular dependence of single-event latchup sensitivity for heavy-ion irradiations of 0.18 um CMOS technology10.1109/TNS.2015.2495101 ↗
8. Single event transient analysis of isolation problems for the high side devices in a 0.18 μm BCD process10.1109/ICREED59404.2023.10390892 ↗
9. Development of a radiation-hardened lateral power MOSFET for POL applications10.1109/TNS.2009.2033922 ↗
10. Design of 30 V high-voltage low-power radiation-tolerant analog switch IC10.1109/TNS.2022.3151409 ↗
11. A radiation-hardened and ESD-optimized wireline driver with wide terminal common-mode voltage range10.1109/TNS.2017.2778942 ↗
12. Discussion of single event effect (SEE) influence and protection design strategy in avionics10.1109/ICIEA58696.2023.10241497 ↗
13. Destructive failure heavy ion testing of different amplifiers10.1109/RADECS.2017.8696112 ↗
14. Test results obtained on the low and high energies heavy ion test facilities10.1109/REDW.2015.7336738 ↗
15. The SEE test results of the different analog devices
16. A field-funneling effect on the collection of alpha-particle-generated carriers in silicon devices10.1109/EDL.1981.25357 ↗
17. Single event effects susceptibilities of select commercial-off-the-shelf components for space10.1109/REDW56037.2022.9921706 ↗
18. Heavy ion single event effects (SEE) results for OPA128 electrometer grade operational amplifier10.1109/NSREC45046.2021.9679341 ↗
19. Bias dependence of muon-induced single event upsets in 28 nm static random access memories10.1109/IRPS.2014.6860585 ↗