Synthesis of Oxide Interface-Based Two-Dimensional Electron Gas on Si

(aAO/STO) heterostructures has received considerable attention owing to its convenience of fabrication and relatively high mobility. The integration of these 2DEG heterostructures on a silicon wafer is highly desired for electronic applications but remains challanging up to date. Here, conductive aAO/STO heterostructures have been synthesized on a silicon wafer via a growth-and-transfer method. A scanning transmission electron microscopy image shows flat and close contact between STO membranes and a Si wafer. Electron energy loss spectroscopic measurements reveal the interfacial Ti valence state evolution, which identifies the formation of 2D charge carriers confined at the interface of aAO/STO. This work provides a feasible strategy for the integration of 2DEG on a silicon wafer and other desired substrates for potential functional and flexible electronic devices.