Energy Dissipation and Electrical Breakdown in Multilayer PtSe₂ Electronics

Investigating the energy dissipation in micro- and nanoscale is fundamental to improve the performance and reliability of two-dimensional (2D) electronics. Recently, 2D platinum selenide (PtSe2) has drawn extensive attention in developing next-generation functional devices due to its distinctive fusion of versatile properties. Toward practical applications of PtSe2 devices, it is essential to understand the interfacial thermal properties between PtSe2 and its substrate. Among them, the thermal boundary conductance (TBC) has played a critical role for out-of-plane heat dissipation of PtSe2 devices. Here, we identify the energy dissipation behavior of multilayer PtSe2 devices and extract the actual TBC value of the PtSe2/SiO2 interface by Raman thermometry with electrical bias. The obtained TBC value is about 8.6 MW m–2 K–1, and it belongs to the low end of as-known solid–solid interfaces, suggesting possible applications regarding thermoelectric devices or others reliant on a large temperature gradient. Furthermore, the maximum current density of the PtSe2 device determines its threshold power, which is crucial for improving device design and guiding future applications. Therefore, we explore the electrical breakdown profile of the multilayer PtSe2 device, revealing the breakdown current density of 17.7 MA cm–2 and threshold power density of 0.2 MW cm–2, which are larger than typical values for commonly used aluminum and copper. These results provide key insights into the energy dissipation of PtSe2 devices and make PtSe2 an excellent candidate for thermal confinement applications and nanometer-thin interconnects, which will benefit the development of energy-efficient functional 2D devices.