Study of Ferroelectric Stack Thickness and Annealing Sequence Effects on GaN HEMTs with Hybrid Ferroelectric Stacks Gate

High Resolution Image Download MS PowerPoint Slide Achieving a stable enhancement-mode (E-mode) operation with a sufficiently high threshold voltage ( V th ) remains a key challenge for GaN power HEMTs. This work investigates the effects of ferroelectric stack thickness and annealing sequence on GaN MOS-HEMTs grown on SiC substrate incorporating a hybrid ferroelectric gate stack composed of Al 2 O 3 /HZO/Al 2 O 3 with an embedded HfON charge-trap layer between HZO and Al 2 O 3 layers. Devices with different HZO stack thicknesses were subjected to postdeposition annealing (PDA) or postmetallization annealing (PMA) at 400 °C in N 2 ambient. PMA-treated devices exhibit a higher and more stable V th, significantly reduced C–V dispersion, and improved robustness after gate-bias initialization compared with PDA-treated devices. The optimized PMA device with a thicker ferroelectric stack achieves a positive V th of up to 5.39 V, enabling a programmable E-mode operation. In addition, ferroelectric metal-ferroelectric-metal capacitors demonstrate pronounced hysteresis behavior in PMA-treated samples, with a remanent polarization (2Pr) of 36.63 μC/cm 2 . These results demonstrate that annealing-sequence-controlled hybrid ferroelectric gate engineering is an effective strategy for realizing high- V th, stable enhancement-mode GaN HEMTs.