journal article·2019-05-28Open access

Low-Temperature Screen-Printed Metallization for the Scale-Up of Two-Terminal Perovskite–Silicon Tandems

Brett A. Kamino, Bertrand Paviet-Salomon, Soo-Jin Moon, Nicolas Badel, Jacques Levrat, Gabriel Christmann, Arnaud Walter, Antonin Faes, Laura Ding, Juan J. Diaz Leon, Adriana Paracchino, Matthieu Despeisse, Christophe Ballif, Sylvain Nicolay

ACS Applied Energy Materials· Volume 2· Issue 5

Abstract

Tandem photovoltaic devices based on perovskite and crystalline silicon (PK/c-Si) absorbers have the potential to push commercial silicon single junction devices beyond their current efficiency limit. However, their scale-up to industrially relevant sizes is largely limited by current fabrication methods which rely on evaporated metallization of the front contact instead of industry standard screen-printed silver grids. To tackle this challenge, we demonstrate how a low-temperature silver paste applied by a screen-printing process can be used for the front metal grid of two-terminal perovskite-silicon tandem structures. Small-area tandem devices with such printed front metallization show minimal thermal degradation when annealed up to 140 degrees C in air, resulting in silver bulk resistivity of <1 x 10(-5) Omega.cm. This printed metallization is then exploited in the fabrication of large area PK/c-Si tandems to achieve a steady-state efficiency of 22.6% over an aperture area of 57.4 cm(2) with a two-bus bar metallization pattern. This result demonstrates the potential of screen-printing metal contacts to enable the realization of large area PK/c-Si tandem devices.
Source: openalex_inverted_index · Quality: baseline

Research context

OpenAlex topics: Perovskite Materials and Applications · Chalcogenide Semiconductor Thin Films · Thin-Film Transistor Technologies

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

PV-Center, CSEM, Jaquet-Droz 1, 2002 Neuchâtel, Switzerland

Institute of Microengineering (IMT) Photovoltaics and Thin-Film Electronics Laboratory (PV-Lab), Ecole Polytechnique Fédérale de Lausanne (EPFL), Rue de la Maladière 71b, 2002 Neuchâtel, Switzerland

Funding

Schweizerischer Nationalfonds zur F?rderung der Wissenschaftlichen Forschung · H2020 European Research Council

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