Dopant- and Trap-Limited Gate Modulation in 2D Tin Halide Perovskite Field-Effect Transistors

Abstract Two-dimensional tin halide perovskites have emerged as promising semiconductor materials for next-generation electronics, such as field-effect transistors (FETs), due to their efficient charge transport properties and low-cost, large-area processability. However, the high density of dopants and traps distributed within the bulk channel limits the electrostatic control of halide perovskite FETs. Here, we investigate the impact of channel properties on the device performance of phenethylammonium tin iodide (PEA2SnI4) FETs by varying the channel thickness from 34.0 to 305.1 nm. When the channel thickness exceeds a critical value of ∼150 nm, corresponding to the maximum depletion width, the devices lose gate modulation, and the on/off ratio collapses to unity. The positive shift in the threshold voltage with thickness indicates a substantial dopant density of ∼7.2 × 1016 cm−3, and the degradation of the subthreshold swing with thickness suggests a high density of deep bulk traps, calculated to be ∼1018 cm−3 eV−1. Furthermore, the analysis of channel crystallinity indicates that a sufficient channel thickness is required for continuous film coverage and that grain boundaries can act as a significant source of apparent bulk traps. Our findings elucidate the effects of dopants and traps within the perovskite channel, suggesting that maximizing gate modulation requires scaling down the channel thickness to the lower limit imposed by the formation of densely packed grains.