Synergistic Effects of Electric Field and Thermal Treatment on Solution-Processed In ₂ O ₃ Thin-Film Transistors

Indium oxide (In 2 O 3 ) thin-film transistors (TFTs) fabricated by a low-temperature solution process tend to suffer from high defect densities and poor bias stability. The introduction of a moderate direct current (DC) electric field during a brief preannealing step can provide a practical low-energy pathway to simultaneously repair structural defects and redistribute charge in the semiconductor. In 2 O 3 films were spin-coated onto a SiO 2 /Si gate electrode and dielectric and subjected to a 10 V DC field for 10 min at preannealing temperatures of 0, 50, 100, and 150 °C, followed by 250 °C hard-backing. The overall performance of the device treated at 100 °C (DC-100) was the best, with a saturation mobility of 4.21 cm 2 V –1 s –1 and an on/off current ratio of 8.6 × 10 6 . Long-term environmental testing showed that the on-state current dropped by only 37% after 30 days, compared to 95% for the pristine device. Gate bias stability further confirms the improved stability: under ±20 V gate stress for 400 s, the threshold voltage excursions of the DC-100 device were only 1.03 V (positive) and −0.54 V (negative), about 1/10th of the excursions observed in the original transistor. Thus, the combined thermal–electric field processing provides a scalable and straightforward solution to obtain high-mobility, bias-stabilized In 2 O 3 TFTs.