Post-Annealing Effects in Low-Voltage Organic Thin-Film Transistors Based on a Vacuum-Deposited S-Shaped Dinaphthothienothiophene Derivative

High Resolution Image Download MS PowerPoint Slide Post-annealing effects in low-voltage organic thin-film transistors (TFTs) based on vacuum-deposited films of the liquid-crystalline small-molecule semiconductor 3,10-didecylnaphtho[2,1- b ]naphtho[1′,2′:4,5]thieno[2,3- d ]thiophene (S-DNTT-10) were investigated. Bottom-contact (BC) and top-contact (TC) TFTs with gold source and drain contacts were prepared by using a high-capacitance gate dielectric based on aluminum oxide and an alkylphosphonic acid self-assembled monolayer. During S-DNTT-10 deposition, the substrate was at room temperature. In BC devices, post-annealing at a temperature of 160 °C leads to a reduction in the number of three-dimensional aggregates on the surface and to a larger grain size of the S-DNTT-10 films, leading to smaller contact resistance, larger intrinsic channel mobility, and better long-term stability in comparison with the TFTs prepared without post-annealing. In TC devices, post-annealing performed before the deposition of the source/drain contacts is found to benefit the initial TFT performance, while post-annealing performed after the source/drain deposition turns out to be better for the long-term stability of the TFTs, presumably due to the fact that the thermally induced morphological changes in the S-DNTT-10 thin films are affected by the presence of the metal contacts (or lack thereof). This study suggests that post-annealing can be of great use for improving the characteristics of organic TFTs based on vacuum-deposited liquid-crystalline organic semiconductors.