Photocontrolled Reconfigurable Logic Based on a Two-Dimensional Heterostructured Transistor
Source abstract
Abstract
Two-dimensional (2D) reconfigurable devices, known for their embedded multiple logic functions, are promising for next-generation electronics and optoelectronics. Here, we present a middle-overlapped dual-gate field-effect transistor (MODG-FET) based on a MoS 2 /h-BN/graphene heterostructure, which integrates reconfigurable logic functions between AND and a follower within a single device. Arising from the programmable nonvolatile photoactivated charges trapped in the h-BN, the reconfiguration is achieved by simultaneously utilizing electrical and optical signals rather than one sole signal in conventional devices, enabling more hardware security for logic gate circuits. Leveraging this behavior, we demonstrate the MODG-FET for hardware encryption and decryption to process ASCII codes by using the gate voltage pulse and UV light stimulation as a key. This work should be helpful in the development of 2D reconfigurable logic transistors, offering high energy and area efficiency while enhancing hardware security in future logic gate circuits, meeting the urgent demand for state-of-the-art information technology.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Advanced Memory and Neural Computing · Advancements in Semiconductor Devices and Circuit Design · Neural Networks and Reservoir Computing
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
School of Microelectronics
Fudan University
School of Information Science and Technology
Hangzhou Normal University
National Integrated Circuit Innovation Center
Funding
National Natural Science Foundation of China
References (46)
Show source-provided references
1. 10.1016/S1369-7021(06)71539-510.1016/S1369-7021(06)71539-5 ↗
2. 10.1038/nature1067910.1038/nature10679 ↗
3. Yeo, K. H.; Suk, S. D.; Li, M.; Yeoh, Y. Y.; Cho, K. H.; Hong, K. H.; Yun, S. K.; Lee, M. S.; Cho, N. M.; Lee, K. H. Gate-All-Around (GAA) Twin Silicon Nanowire MOSFET (TSNWFET) with 15 nm Length Gate and 4 nm Radius Nanowires. 2006 IEEE International Electron Devices Meeting; IEEE, 2006; p 286.10.1109/IEDM.2006.346838 ↗
4. Yu, B.; Chang, L. L.; Ahmed, S.; Wang, H. H.; Bell, S.; Yang, C. Y.; Tabery, C.; Ho, C.; Xiang, Q.; King, T. J. FinFET scaling to 10nm gate length. 2002 IEEE International Electron Devices Meeting; IEEE, 2002; pp 251–254.
5. 10.1038/s41586-023-06145-x10.1038/s41586-023-06145-x ↗
6. 10.1016/j.sse.2021.10803610.1016/j.sse.2021.108036 ↗
7. 10.1016/j.sse.2016.10.02710.1016/j.sse.2016.10.027 ↗
8. 10.1109/TED.2023.334636110.1109/TED.2023.3346361 ↗
9. 10.1021/nn900284b10.1021/nn900284b ↗
10. De Marchi, M.; Sacchetto, D.; Frache, S.; Zhang, J.; Gaillardon, P. E.; Leblebici, Y.; De Micheli, G. Polarity Control in Double-Gate, Gate-All-Around Vertically Stacked Silicon Nanowire FETs. 2012 International Electron Devices Meeting; IEEE, 2012; pp 8.4.1–8.4.4.10.1109/IEDM.2012.6479004 ↗
11. 10.1021/nl203094h10.1021/nl203094h ↗
12. 10.1021/nl300930m10.1021/nl300930m ↗
13. 10.1109/TNANO.2015.242989310.1109/TNANO.2015.2429893 ↗
14. 10.1002/inf2.1235510.1002/inf2.12355 ↗
15. 10.1038/nnano.2014.3510.1038/nnano.2014.35 ↗
16. 10.1038/s41586-021-03339-z10.1038/s41586-021-03339-z ↗
17. 10.1038/nnano.2010.27910.1038/nnano.2010.279 ↗
18. 10.1038/s41565-017-0010-110.1038/s41565-017-0010-1 ↗
19. 10.1038/s41928-020-0433-910.1038/s41928-020-0433-9 ↗
20. 10.1021/nn203715c10.1021/nn203715c ↗
21. 10.1021/acsnano.8b0273910.1021/acsnano.8b02739 ↗
22. 10.1021/acs.nanolett.3c0124810.1021/acs.nanolett.3c01248 ↗
23. 10.1007/s12274-022-4724-510.1007/s12274-022-4724-5 ↗
24. 10.1038/s41928-022-00858-z10.1038/s41928-022-00858-z ↗
25. 10.1126/science.abg316110.1126/science.abg3161 ↗
26. 10.1002/adma.20210775410.1002/adma.202107754 ↗
27. 10.1016/j.esci.2023.10017810.1016/j.esci.2023.100178 ↗
28. 10.1021/nl502741k10.1021/nl502741k ↗
29. 10.1038/s41565-019-0462-610.1038/s41565-019-0462-6 ↗
30. 10.1109/LED.2019.289844810.1109/LED.2019.2898448 ↗
31. 10.1038/s41928-021-00591-z10.1038/s41928-021-00591-z ↗
32. 10.1038/nnano.2017.10410.1038/nnano.2017.104 ↗
33. 10.1109/TCSI.2007.90783510.1109/TCSI.2007.907835 ↗
34. 10.1002/adma.20200530310.1002/adma.202005303 ↗
35. 10.1021/acsnano.9b0281710.1021/acsnano.9b02817 ↗
36. 10.1038/s41928-020-00511-710.1038/s41928-020-00511-7 ↗
37. 10.1038/s41467-022-29795-310.1038/s41467-022-29795-3 ↗
38. 10.1002/adma.20220136410.1002/adma.202201364 ↗
39. 10.1038/nnano.2013.10010.1038/nnano.2013.100 ↗
40. 10.1021/nn202455710.1021/nn2024557 ↗
41. 10.1002/adma.20180447010.1002/adma.201804470 ↗
42. 10.1002/adfm.20241788710.1002/adfm.202417887 ↗
43. 10.1038/s41928-023-01034-710.1038/s41928-023-01034-7 ↗
44. 10.1126/sciadv.aav343010.1126/sciadv.aav3430 ↗
45. 10.1002/adom.20210093710.1002/adom.202100937 ↗
46. 10.1103/PhysRevB.72.22430110.1103/PhysRevB.72.224301 ↗