Schottky Barrier Height Modulation of Metal/n-GeSn Contacts Featuring Low Contact Resistivity by in Situ Chemical Vapor Deposition Doping and NiGeSn Alloy Formation
Source abstract
Abstract
GeSn complementary metal-oxide-semiconductor (CMOS) devices have attracted much attention for future VLSI technology nodes due to high carrier mobility. However, Fermi-level pinning in metal/n-GeSn contacts leads to high contact resistivity and limits GeSn CMOS devices for high-performance logic applications. In this work, we investigate Schottky characteristics and contact resistivity in the metal/n-GeSn contacts. High-quality n-GeSn layers were epitaxially grown by chemical vapor deposition with an in situ doping technique with a high carrier activation rate of 73% up to a doping concentration of ∼1.3 × 1020 cm–3. The electron Schottky barrier heights of the metal/n-GeSn contacts with different Sn fractions and metal work functions were extracted by an I–T method. The results show that the Fermi level is pinned at an energy level slightly above the valence band maximum. The Schottky barrier height is highly correlated with the GeSn band gap energy and decreases with the Sn fraction. The contact resistivity of the metal/n-Ge0.9Sn0.1 contacts was extracted by a refined transmission line model and effectively reduced by increasing the doping concentration in the n-GeSn films. A post-metal annealing step at 400 °C was performed to further reduce the Schottky barrier height by forming NiGeSn alloys. A record low contact resistivity of ∼1.5 × 10–7 Ω·cm2 is achieved without any surface treatment. This is attributed to the reduced Schottky barrier height by increasing the Sn fraction in the n-GeSn film and the reduced Schottky barrier width due to the high carrier density achieved by in situ doping.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Photonic and Optical Devices · Semiconductor materials and interfaces · Nanowire Synthesis and Applications
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Graduate Institute of Electronics Engineering, National Taiwan University, Taipei 10617, Taiwan
Taiwan Semiconductor Research Institute, Hsinchu 30078, Taiwan
Department of Electrical Engineering, National Taiwan University, Taipei 10617, Taiwan
Funding
National Applied Research Laboratories · Ministry of Science and Technology, Taiwan
References (39)
Show source-provided references
1. Liu, M.; Han, G.; Liu, Y.; Zhang, C.; Wang, H.; Li, X.; Zhang, J.; Cheng, B.; Hao, Y. Undoped Ge0.92Sn0.08 Quantum Well PMOSFETs on (001),(011) and (111) Substrates with in Situ Si2H6 Passivation: High Hole Mobility and Dependence of Performance on Orientation. 2014 Symposium on VLSI Technology, 2014; pp 1–2.
2. 10.1109/led.2020.304105110.1109/led.2020.3041051 ↗
3. 10.1109/ted.2018.287252610.1109/ted.2018.2872526 ↗
4. 10.1063/1.278970110.1063/1.2789701 ↗
5. 10.1109/led.2016.259162010.1109/led.2016.2591620 ↗
6. 10.1063/1.241024110.1063/1.2410241 ↗
7. 10.1063/1.498411710.1063/1.4984117 ↗
8. 10.1063/1.499734810.1063/1.4997348 ↗
9. 10.1016/j.sse.2016.10.02410.1016/j.sse.2016.10.024 ↗
10. Sze S. M. · 200610.1002/0470068329 ↗
11. 10.1109/ted.2019.296226710.1109/ted.2019.2962267 ↗
12. 10.1109/ted.2012.223320410.1109/ted.2012.2233204 ↗
13. 10.1039/c8nr05296d10.1039/c8nr05296d ↗
14. 10.1063/1.12518710.1063/1.125187 ↗
15. 10.1063/1.481894510.1063/1.4818945 ↗
16. 10.1063/1.479264910.1063/1.4792649 ↗
17. 10.1063/1.489230210.1063/1.4892302 ↗
18. 10.1007/s11664-014-3089-210.1007/s11664-014-3089-2 ↗
19. 10.1063/1.476738110.1063/1.4767381 ↗
20. 10.1063/1.365863210.1063/1.3658632 ↗
21. 10.3389/fmats.2015.0003010.3389/fmats.2015.00030 ↗
22. Hölzl J. · 197910.1007/BFb0048918 ↗
23. 10.1016/j.sse.2015.01.00710.1016/j.sse.2015.01.007 ↗
24. 10.1116/1.470573010.1116/1.4705730 ↗
25. 10.1109/led.2016.256680910.1109/led.2016.2566809 ↗
26. 10.1016/s0167-9317(01)00684-010.1016/s0167-9317(01)00684-0 ↗
27. Murarka S. P. · 2012
28. 10.1063/1.367666710.1063/1.3676667 ↗
29. Miyoshi, H.; Ueno, T.; Akiyama, K.; Hirota, Y.; Kaitsuka, T. In-Situ Contact Formation for Ultra-low Contact Resistance NiGe Using Carrier Activation Enhancement (CAE) Techniques for Ge CMOS. 2014 Symposium on VLSI Technology, 2014.10.1109/VLSIT.2014.6894409 ↗
30. 10.1109/ted.2018.286762210.1109/ted.2018.2867622 ↗
31. 10.1016/j.tsf.2019.13756810.1016/j.tsf.2019.137568 ↗
32. 10.1088/0268-1242/30/5/05500310.1088/0268-1242/30/5/055003 ↗
33. 10.1016/j.mseb.2008.09.03710.1016/j.mseb.2008.09.037 ↗
34. 10.1063/1.503672810.1063/1.5036728 ↗
35. Wang, L.; Liu, B.; Gong, X.; Guo, P.; Zhou, Q.; Chua, L.H.; Zou, W.; Hatem, C.; Henry, T.; Yeo, Y.C. Self-Crystallization and Reduced Contact Resistivity by Hot Phosphorus Ion Implant in Germanium-Tin Alloy. Proceedings of Technical Program—2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2014.
36. 10.1063/1.302834310.1063/1.3028343 ↗
37. 10.1063/1.488374810.1063/1.4883748 ↗
38. 10.1016/j.sse.2015.09.01010.1016/j.sse.2015.09.010 ↗
39. 10.1088/1361-6463/ab77e010.1088/1361-6463/ab77e0 ↗