Electric double-layer transistors: a review of recent progress

With the miniaturization of electronic devices, it is essential to achieve higher carrier density and lower operation voltage in field-effect transistors (FETs). However, this is a great challenge in conventional FETs owing to the low capacitance and electric breakdown of gate dielectrics. Recently, electric double-layer technology with ultra-high charge-carrier accumulation at the semiconductor channel/electrolyte interface has been creatively introduced into transistors to overcome this problem. Some interesting electrical transport characteristics such as superconductivity, metal–insulator transition, and tunable thermoelectric behavior have been modulated both theoretically and experimentally in electric double-layer transistors (EDLTs) with various semiconductor channel layers and electrolyte materials. The present article is a review of the recent progress in the EDLTs and the impacts of EDLT technology on modulating the charge transportation of various electronics.