Show source-provided references
4. Stevanovic, L. D.; Matocha, K. S.; Losee, P. A.; Glaser, J. S.; Nasadoski, J. J.; Arthur, S. D. In Recent Advances in Silicon Carbide MOSFET Power Devices, Twenty-Fifth Annual IEEE Applied Power Electronics Conference and Exposition (APEC), 2010; pp 401–407.
10.1109/APEC.2010.5433640 ↗8. Herrmann, T.; Feller, M.; Lutz, J.; Bayerer, R.; Licht, T. In Power Cycling Induced Failure Mechanisms in Solder Layers, European Conference on Power Electronics and Applications, 2007; pp 1–7.
10.1109/EPE.2007.4417702 ↗10. Shangguan D. · 2005
17. Sakai H. · Fujitsu Technol. J. · 2009 · 40
18. Mitamura, K.; Ozaki, Y.; Murakami, Y.; Takahashi, H.; Tanisawa, H.; Koui, K.; Kato, F.; Sato, S.; Yamaguchi, H.; Sato, H. In A Transfer-Molded High Temperature SiC Power Module Withstanding up to 250° C, 10th International Conference on Integrated Power Electronics Systems, 2018; pp 1–6.
20. Mandray, S.; Guichon, J.M.; Schanen, J.L.; Vieillard, S.; Bouzourene, A. In Automatic Layout Optimization of a Double Sided Power Module Regarding Thermal and EMC Constraints, IEEE Energy Conversion Congress and Exposition, 2009; pp 1046–1051.
10.1109/ECCE.2009.5316092 ↗21. Schanen, J.L.; Roudet, J. Built-In EMC for Integrated Power Electronics Systems, 5th International Conference on Integrated Power Electronics Systems 2008; pp 1–10.
10.1080/09398368.2011.11463782 ↗29. Woo, D. R. M.; Yuan, H. H.; Li, J. A. J.; Ling, H. S.; Bum, L. J.; Songbai, Z.; Hengyun, Z.; Selvaraj, S. L.; Velez, S. D.; Singh, R. P. In High Power SiC Inverter Module Packaging Solutions for Junction Temperature Over 220° C, IEEE 16th Electronics Packaging Technology Conference (EPTC), 2014; pp 31–35.
10.1109/EPTC.2014.7028383 ↗38. Chae, S.H.; Zhao, J.H.; Edwards, D. R.; Ho, P. S. In Characterization of Viscoelasticity of Molding Compounds in Time Domain, International Electronic Packaging Technical Conference and Exhibition, 2009; pp 435–441.
10.1115/InterPACK2009-89388 ↗40. Huang, X.; Lee, S. In Stress Relaxation in Plastic Molding Compounds, Proceedings of the 4th International Symposium on Electronic Materials and Packaging, 2002; pp 37–42.
41. Hu, G.; Tay, A. A.; Zhang, Y.; Zhu, W.; Chew, S. In Characterization of Viscoelastic Behaviour of a Molding Compound With Application to Delamination Analysis in IC Packages, 8th Electronics Packaging Technology Conference, 2006; pp 53–59.
10.1109/EPTC.2006.342690 ↗44. Osonoe, K.; Asai, T.; Aoki, M.; Kida, H.; Nakano, N. Comparison of Thermal Stress Concentration and Profile Between Power Cycling Test and Thermal Cycling Test for Power Device Heat Dissipation Structures Using Ag Sintering Chip-Attachment, International Conference on Electronics Packaging (ICEP), 2016; pp 631–634.
10.1109/ICEP.2016.7486906 ↗45. De Voto, D. J.; Paret, P.; Wereszczak, A. A.In Stress Intensity of Delamination in a Sintered-Silver Interconnection, IMAPSource Proceedings 2014 (HITEC), 2014; pp 190–197.
10.4071/HITEC-WA26 ↗48. Gökdeniz, Z. G.; Lederer, M.; Khatibi, G.; Nicolics, J. In Temperature Dependent Relaxation Behavior of Ag-Sintered Copper Joints, 23rd European Microelectronics and Packaging Conference & Exhibition (EMPC), 2021; pp 1–5.
10.23919/EMPC53418.2021.9585013 ↗49. Cosiansi, F. ISPET: Interface Sintering Process Enhanced Technology, PhD Thesis, Politecnico di Torino, 2016.
53. Sattar, M.; Othman, A. Prediction Model for the Creep crack growth for the Life Assessment of Steel Components, PhD Thesis, Universiti Teknologi Petronas, 2020.