Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications
Source abstract
Abstract
This article reports an improvement in the performance of the hafnium oxide-based (HfO2) ferroelectric field-effect transistors (FeFET) achieved by a synergistic approach of interfacial layer (IL) engineering and READ-voltage optimization. FeFET devices with silicon dioxide (SiO2) and silicon oxynitride (SiON) as IL were fabricated and characterized. Although the FeFETs with SiO2 interfaces demonstrated better low-frequency characteristics compared to the FeFETs with SiON interfaces, the latter demonstrated better WRITE endurance and retention. Finally, the neuromorphic simulation was conducted to evaluate the performance of FeFETs with SiO2 and SiON IL as synaptic devices. We observed that the WRITE endurance in both types of FeFETs was insufficient to carry out online neural network training. Therefore, we consider an inference-only operation with offline neural network training. The system-level simulation reveals that the impact of systematic degradation via retention degradation is much more significant for inference-only operation than low-frequency noise. The neural network with FeFETs based on SiON IL in the synaptic core shows 96% accuracy for the inference operation on the handwritten digit from the Modified National Institute of Standards and Technology (MNIST) data set in the presence of flicker noise and retention degradation, which is only a 2.5% deviation from the software baseline.
Source: europepmc · Quality: candidate unverified · Source record ↗
Research context
OpenAlex topics: Ferroelectric and Negative Capacitance Devices · Advanced Memory and Neural Computing · Semiconductor materials and devices
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Fraunhofer-Institut für Photonische Mikrosysteme IPMS - Center Nanoelectronic Technologies, Dresden01109, Germany
GlobalFoundries, Dresden01109, Germany
Technische Universität Bergakademie Freiberg, Freiberg09599, Germany
Funding
Bundesministerium für Wirtschaft und Technologie · Freistaat Sachsen · Horizon 2020 Framework Programme · Electronic Components and Systems for European Leadership
References (53)
Show source-provided references
1. 10.1162/neco.1989.1.4.54110.1162/neco.1989.1.4.541 ↗
2. 10.1109/5.72679110.1109/5.726791 ↗
3. 10.1038/nature1453910.1038/nature14539 ↗
4. 10.1109/MM.2018.11213035910.1109/MM.2018.112130359 ↗
5. 10.1109/TCAD.2015.247439610.1109/TCAD.2015.2474396 ↗
6. 10.1038/s41586-022-04992-810.1038/s41586-022-04992-8 ↗
7. 10.1038/s41586-021-04196-610.1038/s41586-021-04196-6 ↗
8. 10.36227/techrxiv.19491212.v110.36227/techrxiv.19491212.v1 ↗
9. 10.1109/ICICDT51558.2021.962648910.1109/ICICDT51558.2021.9626489 ↗
10. 10.3389/fnano.2021.82623210.3389/fnano.2021.826232 ↗
11. 10.1109/TCAD.2022.319769410.1109/TCAD.2022.3197694 ↗
12. 10.1109/LRA.2022.315142610.1109/LRA.2022.3151426 ↗
13. 10.1063/1.200114610.1063/1.2001146 ↗
14. 10.1038/nmat274810.1038/nmat2748 ↗
15. 10.1038/nnano.2015.22110.1038/nnano.2015.221 ↗
16. 10.1088/1361-6463/ab39a010.1088/1361-6463/ab39a0 ↗
17. 10.1063/1.504241310.1063/1.5042413 ↗
18. 10.1109/IEDM.2009.542426310.1109/IEDM.2009.5424263 ↗
19. 10.1007/s11664-006-0024-110.1007/s11664-006-0024-1 ↗
20. 10.1021/nl302049k10.1021/nl302049k ↗
21. 10.1109/VLSI-TSA54299.2022.977101510.1109/VLSI-TSA54299.2022.9771015 ↗
22. 10.1109/IEDM19573.2019.899364210.1109/IEDM19573.2019.8993642 ↗
23. 10.1109/IMW52921.2022.977928110.1109/IMW52921.2022.9779281 ↗
24. De, S.; Lederer, M.; Raffel, Y.; Müller, F.; Seidel, K.; Kämpfe, T.Roadmap for Ferroelectric Memory: Challenges and Opportunities for IMC Applications. In Internation SoC Conference2022; pp 1–2.10.36227/techrxiv.20518104.v1 ↗
25. 10.1109/JEDS.2022.319511910.1109/JEDS.2022.3195119 ↗
26. De, S.; Qiu, B.H.; Bu, W.X.; Baig, M. A.; Su, C.J.; Lee, Y.J.; Lu, D.Neuromorphic Computing with Deeply Scaled Ferroelectric FinFET in Presence of Process Variation, Device Aging and Flicker Noise. arXiv2021; abs/2103.13302, pp 1–4; https://arxiv.org/abs/2103.13302.
27. 10.1109/IEDM.2016.783839710.1109/IEDM.2016.7838397 ↗
28. 10.1109/LED.2021.308962110.1109/LED.2021.3089621 ↗
29. 10.1109/TED.2021.306871610.1109/TED.2021.3068716 ↗
30. 10.1109/IEDM.2017.826833810.1109/IEDM.2017.8268338 ↗
31. 10.1109/IEDM.2017.826842510.1109/IEDM.2017.8268425 ↗
32. 10.1109/JEDS.2019.290295310.1109/JEDS.2019.2902953 ↗
33. 10.1109/TDMR.2007.89753210.1109/TDMR.2007.897532 ↗
34. 10.1021/acsaelm.0c0061010.1021/acsaelm.0c00610 ↗
35. 10.3390/electronicmat203002410.3390/electronicmat2030024 ↗
36. 10.1021/acsaelm.1c0059010.1021/acsaelm.1c00590 ↗
37. 10.1109/IMW52921.2022.977927710.1109/IMW52921.2022.9779277 ↗
38. 10.1109/VLSI-TSA54299.2022.977100310.1109/VLSI-TSA54299.2022.9771003 ↗
39. 10.1109/VLSI-TSA51926.2021.944009110.1109/VLSI-TSA51926.2021.9440091 ↗
40. De, S.; Lu, D. D.; Le, H.H.; Mazumder, S.; Lee, Y.J.; Tseng, W. C.; Qiu, B.H.; Baig, A.; Sung, P.J.; Su, C.J.; Wu, C. T.; Wu, W. F.; Yeh, W.K.; Wang, Y.H.Ultra-Low Power Robust 3bit/cell Hf0.5Zr0.5O2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology. In IEEE 2021 Symposia on VlSI Circuits and Technology; 2021; pp 11–12.
41. 10.1109/LED.2021.308321910.1109/LED.2021.3083219 ↗
42. 10.36227/techrxiv.19950497.v110.36227/techrxiv.19950497.v1 ↗
43. 10.1109/LED.2019.290808410.1109/LED.2019.2908084 ↗
44. 10.1109/LED.2021.307443410.1109/LED.2021.3074434 ↗
45. 10.1109/EUROSOI-ULIS49407.2020.936529610.1109/EUROSOI-ULIS49407.2020.9365296 ↗
46. Haartman M. · 200710.1007/978-1-4020-5910-0 ↗
47. 10.1109/IEDM.2017.826833710.1109/IEDM.2017.8268337 ↗
48. 10.1109/DRC50226.2020.913518610.1109/DRC50226.2020.9135186 ↗
49. 10.1088/1361-6641/ac3f2210.1088/1361-6641/ac3f22 ↗
50. De, S.; Thunder, S.; Lehninger, D.; Jank, M. P. M.; Lederer, M.; Raffel, Y.; Seidel, K.; Kämpfe, T.Low-Power Vertically Stacked One Time Programmable Multi-bit IGZO-Based BEOL Compatible Ferroelectric TFT Memory Devices with Lifelong Retention for Monolithic 3D-Inference Engine Applications. In 2022 European Solid-state Devices and Circuits Conference, 2022; ESSDERC: 2022; pp 1–4.10.36227/techrxiv.19491221.v1 ↗
51. 10.1109/TED.2018.285681810.1109/TED.2018.2856818 ↗
52. 10.1039/C9TC05157K10.1039/C9TC05157K ↗
53. 10.1016/j.actamat.2022.11792010.1016/j.actamat.2022.117920 ↗