Solution-processed charge-trap/ferroelectric hybrid memory transistor for enhanced data storage and neuromorphic computing
Source abstract
Abstract
Dual-gate multi-bit memory transistors that combine charge-trap and ferroelectric effects are demonstrated as a synaptic memory with high dynamic range.
Only a short abstract or summary was supplied by the source.
Source: crossref · Quality: short
Research context
OpenAlex topics: Ferroelectric and Negative Capacitance Devices · Advanced Memory and Neural Computing · Ferroelectric and Piezoelectric Materials
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Department of Creative Convergence Engineering, Hanbat National University, Daejeon 34158, Republic of Korea
School of Advanced Fusion Studies, Department of Intelligent Semiconductor Engineering, University of Seoul, 163 Seoulsiripdaero, Dongdaemun-gu, Seoul, 02504, Republic of Korea
Research Institute of Printed Electronics & 3D Printing, Industry University Cooperation Foundation, Hanbat National University, Daejeon 34158, Republic of Korea
Funding
Ministry of Education · Ministry of Science and ICT, South Korea · University of Seoul
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