Influence of channel thickness on charge transport behavior of multi-layer indium selenide (InSe) field-effect transistors

Abstract Atomically thin Van der Waals solids that exhibit direct band gap in their few layer form can substantially impact the field of two dimensional (2D) materials based electronic devices and related applications. Here we report on electronic charge transport behavior of multi layer n -type InSe field-effect transistor (FET) devices fabricated on SiO ₂ /Si substrate with seven different channel thicknesses, t > 20 nm, well within its direct band gap regime. Through gate dependent conductivity measurements over a wide range of temperatures ( T ; 20 K < T < 310 K), we show that, irrespective of the channel thickness, carrier transport in these materials occurs via Arrhenius-type activated process above a certain characteristic temperature ( T ^* ), whereas for temperatures T < T ^* conduction occurs via variable range hopping (VRH) mechanism consistent with Mott’s 2D VRH formalism, manifesting the presence of disorder induced localized states in these channels. Although the broad mechanisms of charge transport in all these devices are similar, the variation of correlation energy value ( T ₁ ) of VRH with channel thickness indicates fewer density of localized states in thinner channels and hence higher electron mobility even without sufficient charge impurity screening from the substrate. Such intricate interplay between channel thickness and charge impurity screening and its influence on overall disorder landscape and hence on carrier localization in 2D layered systems underscores the need for strategic optimization of device parameters for their future prospect in electronic applications.