Low-temperature processed beta-phase In ₂ Se ₃ ferroelectric semiconductor thin film transistors

Abstract As scaling becomes increasingly difficult, there is growing interest in vertical or three-dimensional stacking of transistors and especially memory. Ferroelectric semiconductor field effect transistors can be key enablers to improve energy efficiency and overall chip and memory performance. In this work, low-temperature processed, back-end-of-the-line compatible transistors were demonstrated by depositing a layered chalcogenide ferroelectric semiconductor, beta-phase In ₂ Se ₃ , at temperature as low as 400 °C. Top gate n-channel In ₂ Se ₃ thin film transistors were fabricated with field-effect mobility ∼1 cm ² V ⁻¹ s ⁻¹ , and simple polarization switching based memory results are presented.