A CAD-based calibrated simulation framework for double gate a-IGZO TFTs

Double-gate TFTs (Thin Film Transistors) are widely used in pixel circuitry, flexible displays, biochemical and environmental sensors, and non-volatile devices like flash memory. However, limited CAD-based double-gate TFT (DGTFT) models are available for accurately simulating and optimizing these applications. Therefore, the paper presents the adaptation of the existing HSPICE (High-level Simulation Program with Integrated Circuit Emphasis) level-58 model initially crafted by the University of Florida for fully depleted silicon-on-insulator (FDSOI) technology to emulate the performance traits of double-gate amorphous indium gallium zinc oxide (a-IGZO) TFTs. The adapted double-gate a-IGZO TFT model accurately reproduces the TFTs’ experimental characteristics, establishing its viability for integration into CAD tool systems and streamlining pixel circuit simulations. Additionally, the adapted level-58 FD-SOI model offers insights into the behavior of Zinc Oxide (ZnO) thin-film transistors, particularly elucidating phenomena like the ‘kink effect’, etc. Crucially, the performance parameters derived from the adapted models closely correlate with experimental data, enhancing the accuracy of the adapted model. In the subthreshold regime, the maximum deviation in the subthreshold slope is around 10 mV/decade. Performance metrics such as on-to-off ratio Ion/Ioff, negative bias reverse saturation current (I0), and threshold voltage (VTH) closely correspond with experimental data. There are only slight average deviations of 0.03% in the output characteristics of the adapted level-58 FD SOI model, emphasizing its increased accuracy in calibrated results.