Highly Robust Atomic Layer Deposition‐Indium Gallium Zinc Oxide Thin‐Film Transistors with Hybrid Gate Insulator Fabricated via Two‐Step Atomic Layer Process for High‐Density Integrated All‐Oxide Vertical Complementary Metal‐Oxide‐Semiconductor Applications

Highly reliable atomic layer deposition (ALD)‐derived In‐Ga‐Zn‐O thin‐film transistors with high field‐effect mobility (μ_FE) and hydrogen (H) resistivity are crucial for the semiconductor industry. Herein, a hybrid Al₂O₃ gate insulator (GI) is proposed that is designed by controlling the plasma‐enhanced ALD and thermal ALD processes in situ to demonstrate robust characteristics. A hybrid GI is applied to the top‐gate geometry of an In_0.71Ga_0.08Zn_0.21O active layer. The optimal device exhibits exceptional electrical characteristics, including a threshold voltage of 0.37 V, μ_FE of 150.7 cm² V s⁻¹, subthreshold swing of 64.0 mV decade⁻¹, and hysteresis of 0.02 V. It demonstrates high resistance to H annealing and reliable positive bias temperature stress, as well as changes in V_TH shifts of −0.43 and 0.00 V, respectively. The excellent electrical characteristics and high robustness of the device can be attributed to the precise control of H, oxygen, and carbon species within the upper region of the hybrid GI. The achievement of robust device characteristics enables the design of a novel vertical complementary metal‐oxide‐semiconductor inverter that exhibits a voltage gain of 44.7 V V⁻¹ and a noise margin of 87.5% at a 10 V supply voltage.