journal article·2022-09

Performance Analysis of Gate Stack DG-MOSFET for Biosensor Applications

Saradiya Kishor Parija, Sanjit Kumar Swain, Sudhansu Mohan Biswal, Sarosij Adak, Pradipta Dutta

Silicon· Volume 14· Issue 14
Publisher page

Abstract

In this paper the performance of gate stack metal oxide semiconductor field effect transistor (MOSFET) is investigated with respect to different bio molecules for application as biosensor device. In order to beat the limits of short channel effects (SCEs) the double gate stack MOSFET has been preferred as the proposed device. For biosensor application, dielectric modulation technique has been chosen and effect of different bio molecules like protein, biotin, streptavidin, APTES, etc. are studied to verify the sensitivity as a biosensor for this proposed device. The sensitivity parameter and analog/Rf parameter have been studied for different bio-molecules and a comparative result has been established. The sensitivity of bimolecules located in the cavity side by the oxide region is observed in the variation of threshold voltage and also different analog and RF parameters which can be used for future application in the area of medical science. Two oxide layer one is high k(HfO2) and low k(SiO2) has been used for stacking. For simulations, 2D Sentrausu TCAD simulator has been used.
Source: expertdata · Quality: candidate unverified · Source record ↗

Research context

OpenAlex topics: Advancements in Semiconductor Devices and Circuit Design · Nanowire Synthesis and Applications · Semiconductor materials and devices

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

References (41)

Show source-provided references
1. Woerlee PH, Knitel MJ et al (2001) RFCMOS perfomances trends. IEEE Trans Electron Devices 48:1776–178210.1109/16.936707 ↗
2. Kilchytska V, Neve A, Vaneaillie L et al (2003) Influence of device engineering on analog and RF perfomance of SOI MOSFETs IEEE Trans. Electron Devices 50:577–58810.1109/TED.2003.810471 ↗
3. Young KK (1989) Short channel effect in fully depleted SOI MOSFETs. IEEE Trans Electron Devices 36:399–40210.1109/16.19942 ↗
4. Frank DJ et al (2001) Device scaling limits of Si MOSFETs and their application. Proc IEEE 89:259–28810.1109/5.915374 ↗
5. S.K.Swain et al., “Effect of Channel Thickness and Doping Concentration on Sub-Threshold Performance of Graded Channel and Gate Stack DG MOSFETs” JOLPE, vol.11, pp 366–372 , 2015.10.1166/jolpe.2015.1395 ↗
6. Balestra F, Cristoloveanu S, Benachir M et al (1987) Double gate silicon-on-insulator with volume inversion. IEEE Electron Device Lett 9:410–41210.1109/EDL.1987.26677 ↗
7. Swain SK et al (2016) Influence of channel length and high-K oxide thickness on subthreshold analog/RF performance of graded channel and gate stack DG-MOSFETs. Microelectron Reliab 61:24–2910.1016/j.microrel.2016.03.001 ↗
8. C. L. chen, J. M. Knecht, J. Kedzierski, “Channel Engineering for SOI-MOSFETs for RF applications” Proc. IEEE Int. SOI Conf, 5232–5233, 2009.10.1109/SOI.2009.5318756 ↗
9. Taur Y, Buchanan DA, Chen W et al (1997) Dimensional effects in MOSFETs. Proc IEEE 85:486–50410.1109/5.573737 ↗
10. Sharma RK, Gupta M, Gupta RS (2011) TCAD Assessment of Device Design Technologies for Enhanced Performance of Nanoscale DG MOSFET. IEEE Trans Electron Devices 58:2936–294310.1109/TED.2011.2160065 ↗
11. Djeffal F, Ghoggali Z, Dibi Z et al (2009) Analytical analsis of nanoscale multiple gate MOSFETs including effects of hot-carrier induced interface charges. Microelectron Reliab 49:377–38110.1016/j.microrel.2008.12.011 ↗
12. Nirmal D, Vijaya Kumar P et al (2014) A review of Nanoscale Channel and gate Engineered FINFETs for VLSI Mixed Applications Using Zirconium-di-Oxide Dielectrics. JEST Review 7:119–12410.25103/jestr.072.18 ↗
13. Mohankumar N, Samal B, Sarkar CK (2010) Influence of channel and gate engineering on the analog and RF perfomance of DG MOSFETs. IEEE Trans Electron Devices 57:820–82610.1109/TED.2010.2040662 ↗
14. Lee CW, Afzalian A, Akhavan ND, Yan R, Ferain I, Colinge JP (2009) Junction-less multigate field-effect transistor. Appl Phys Lett 94:05351110.1063/1.3079411 ↗
15. Colinge J, Lee C, Afzalian A, Akhavan ND, Yan R, Ferain I, Razavi P, O’Neill B, Blake A, White M, Kelleher A, McCarthy B, Murphy R (2010) Nanowire transistors without junctions. Nat Nano 5(3):225–32210.1038/nnano.2010.15 ↗
16. Gnani E, Gnudi A, Reggiani S, Baccarani G (2011) Theory of the junctionless nanowire FET. IEEE Trans Electron Devices 58:2903–291010.1109/TED.2011.2159608 ↗
17. Nirmal D et al (2014) A review of Nanoscale Channel and gate Engineered FINFETs for VLSI Mixed Applications Using Zirconium-di-Oxide Dielectrics. JEST Review 7:119–12410.25103/jestr.072.18 ↗
18. Mohankumar N et al (2010) Influence of channel and gate engineering on the analog and RF peRFomance of DG MOSFETs. IEEE Trans Electron Devices 57:820–82610.1109/TED.2010.2040662 ↗
19. Swain SK et al (2018) Performance Study of GCGS DG-MOSFETs for Asymmetric Doping and High K Oxide Material Using NQS Method. Journal of Active and Passive Electronic Devices 13(2–3):149–163
20. Pradhan KP et al (2014) Impact of high-K gate dielectric on analog and RF peRFomance of nanoscale DG-MOSFET. Microelectron J 45:144–15110.1016/j.mejo.2013.11.016 ↗
21. Parija SK, Swain SK, Adak S, Biswal SM, Dutta P (2021 May) Comparison Study of DG-MOSFET with and without Gate Stack Configuration for Biosensor Applications. SILICON 11:1–2
22. Kumar A, Gupta N, Tripathi MM, Chaujar R (2020 Jul) Analysis of structural parameters on sensitivity of black phosphorus junctionless recessed channel MOSFET for biosensing application. Microsyst Technol 26(7):2227–223310.1007/s00542-019-04545-6 ↗
23. Semiconductor Industry Association, International Technology Roadmap for Semiconductors, (2011) SIA San Jose
24. Saxena M et al (2003) Modelling and simulation of asymmetric gate stack (ASYMGAS)-MOSFET. Solid State Electron 47:2134–213410.1016/S0038-1101(03)00221-1 ↗
25. Inani A et al (1999) Gate stack architecture analysis and channel engineering in deep sub-micron MOSFETs. Jpn J Appl Phys 38:2266–227110.1143/JJAP.38.2266 ↗
26. Synopsys TCAD Sentaurus device user's manual VG-2013.06.
27. Chakraborty A et al (2017) Analytical modeling and sensitivity analysis of dielectric-modulated junctionless gate stack surrounding gateMOSFET (JLGSSRG) for application as biosensor. Journal of Comput Electron 16:556–56710.1007/s10825-017-0999-2 ↗
28. Biswal SM, Baral B, De D, Sarkar A (2016 Mar) Study of effect of gate-length downscaling on the analog/RF performance and linearity investigation of InAs-based nanowire Tunnel FET. Superlattices Microstruct 1(91):319–33010.1016/j.spmi.2016.01.021 ↗
29. Biswal SM, Baral B, De D, Sarkar A (2019 May) Simulation and comparative study on analog/RF and linearity performance of III–V semiconductor-based staggered heterojunction and InAs nanowire (nw) Tunnel FET. Microsyst Technol 25(5):1855–186110.1007/s00542-017-3642-z ↗
30. Anand S, Singh A, SI A, Thool Amin AS (2019) Design and performance analysis of dielectrically modulated doping-less tunnel FET-based label free biosensor. IEEE Sensors Journal 12:4369–7410.1109/JSEN.2019.2900092 ↗
31. Narang R, Reddy KVS, Saxena M, Gupta RS, Gupta M (2012) A Dielectric-Modulated Tunnel-FET-Based Biosensor for Label-Free Detection: Analytical Modeling Study and Sensitivity Analysis. Electron Devices, IEEE Transactions 59(10):2809–281710.1109/TED.2012.2208115 ↗
32. R. Narang, M. Saxena, M. Gupta, “Analytical model of gate underlap Double Gate Junctionless MOSFET as a bio-sensor Devices”. Circuits and Systems (ICDCS), 2016 3rd International Conference on, IEEE, 2016
33. Chakraborty A, Sarkar A (2017) Analytical modeling and sensitivity analysis of dielectric-modulated junctionless gate stack surrounding gate MOSFET (JLGSSRG) for application as biosensor. J Comput Electron 3:556–56710.1007/s10825-017-0999-2 ↗
34. S. Pandey, D.Singh, D. Sharma, “A Charge Plasma Based Dielectric Modulated Heterojunction TFET Based Biosensor for Health-IoT Applications” Springer Nature Singapore Pte Ltd. International Conference on Smart System, Innovations and Computing, Smart Innovation,Systems and Technologies 79. 2018.
35. A. Kumar, N. Gupta, M.M.Tripathi, R. Chaujar , “Analysis of structural parameters on sensitivity of black phosphorus junctionless recessed channel MOSFET for biosensing application’. Microsystem Technologies, 1–7. (2019)10.1007/s00542-019-04545-6 ↗
36. Kim C, Ahn J, Lee K et al (2012) A new sensing metric to reduce data fluctuations in a nanogap-embedded field-effect transistor biosensor. IEEE Trans Electron Devices 59:2825–283110.1109/TED.2012.2209650 ↗
37. Im H, Huang XJ, Gu B, Choi YK (2007) A dielectric-modulated field-effect transistor for biosensing. Nat Nanotechnol 2:430–43410.1038/nnano.2007.180 ↗
38. S. Pandey, D.Singh, D. Sharma, “A Charge Plasma Based Dielectric Modulated Heterojunction TFET Based Biosensor for Health-IoT Applications” Springer Nature Singapore Pte Ltd. International Conference on Smart System, Innovations and Computing, Smart Innovation,Systems and Technologies 79. 2018
39. Das SK, Nanda U, Biswal SM, Pandey CK, Giri LI (2021 Apr) Performance Analysis of Gate-Stack Dual-Material DG MOSFET Using Work-Function Modulation Technique for Lower Technology Nodes. SILICON 1:1–9
40. Swain SK, Das SK, Biswal SM, Adak S, Nanda U, Sahoo AA, Navak D, Baral B, Tripathy D. Effect of high-K spacer on the performance of non-uniformly doped DG-MOSFET. In2019 Devices for Integrated Circuit (DevIC) 2019 Mar 23 (pp. 510–514). IEEE.10.1109/DEVIC.2019.8783740 ↗
41. Das SK, Swain SK, Biswal SM, Nayak D, Nanda U, Baral B, Tripathy D. Effect of high-K spacer on the performance of gate-stack uniformly doped DG-MOSFET. In2019 Devices for Integrated Circuit (DevIC) 2019 Mar 23 (pp. 365–369). IEEE.10.1109/DEVIC.2019.8783272 ↗