Investigation of Inherent Capacitive Effects in Linear Memristor Model

Memristor plays a vital role in the advancement of recent semiconductor technology and has become a promising candidate in stepping up its progress towards Moore’s law. It attracts the attention of researchers with its small dimension, non-volatility comparable to flash memory, low cost, and its exploitation in the building of highly dense integrated circuits. In this manuscript, a novel memristor model is developed by adding a parallel variable capacitor in the linear model of memristor of the HP’s lab. The modified model of the memristor is simulated in the Matlab and variation of the capacitance and reactive capacitance is observed with the input signal, conductive width, thickness of the device, and with the input signal frequency variations. Apart from this, C-V characteristics and charge-voltage pinched hysteresis loop is also plotted and analyzed. It is seen that the capacitance of the parallel capacitor varies with the variation of the conductive width and thus insulating thickness of memristor, similar to RON and ROFF in the linear memristor model. In the saturation condition, a capacitance of 2.4 × 10−11 F is attained while a capacitance of 7 × 10−13 F is attained in the depletion state of the memristor.