In‐plane gate transistors implanted with different channel geometries by focussed ion beam in positive mode pattern definition technique
Source abstract
Abstract
Abstract In‐plane gate (IPG) transistors with various channel geometries have been fabricated by focus ion beam implantation technique in positive pattern definition mode on GaAs/AlxGa1−xAs heterostructures. Both n‐ and p‐type channel transistors were obtained for either n‐ or p‐doped heterostructures, by implantation of the channel or the gate regions with the complementary dopant type to compensate the initial doping. The current–voltage characteristics showed that the channel can be fully controlled by a gate bias, i.e., it can be completely depleted or enhanced, but two gates are needed to control the channel. Different channel geometries were studied, the most efficient being the “Z‐shaped” one. The n‐type channel IPG transistors present source–drain currents of few hundreds of microamperes, which is two to three orders of magnitudes higher than that for the p‐type channel ones.
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Research context
OpenAlex topics: Semiconductor materials and devices · Ion-surface interactions and analysis · Integrated Circuits and Semiconductor Failure Analysis
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (25)
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