Kinetics of Salicide Contact Formation for Thin‐Film SOI Transistors
Source abstract
Abstract
Problems of voiding and poor contact resistance have plagued recent attempts to apply salicide technology to silicon‐on‐insulator (SOI) transistors. A physical picture is developed to explain why these problems occur. The picture rests on the known kinetics of silicide formation and the resistance to silicon diffusion imposed by device geometry.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Semiconductor materials and interfaces · Thin-Film Transistor Technologies · Nanowire Synthesis and Applications
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Affiliations
Department of Chemical Engineering, University of Illinois at Urbana‐Champaign, Urbana, Illinois 61801
References
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