journal article·2023Open access

Energy-Efficient Scheduling Based on Task Migration Policy Using DPM for燞omogeneous MPSoCs

Hamayun Khan, Irfan Ud din, Arshad Ali, Sami Alshmrany

Computers, Materials & Continua· Volume 74· Issue 1

Abstract

Increasing the life span and efficiency of Multiprocessor System on Chip (MPSoC) by reducing power and energy utilization has become a critical chip design challenge for multiprocessor systems. With the advancement of technology, the performance management of central processing unit (CPU) is changing. Power densities and thermal effects are quickly increasing in multi-core embedded technologies due to shrinking of chip size. When energy consumption reaches a threshold that creates a delay in complementary metal oxide semiconductor (CMOS) circuits and reduces the speed by 10%–15% because excessive on-chip temperature shortens the chip’s life cycle. In this paper, we address the scheduling & energy utilization problem by introducing and evaluating an optimal energy-aware earliest deadline first scheduling (EA-EDF) based technique for multiprocessor environments with task migration that enhances the performance and efficiency in multiprocessor system-on-chip while lowering energy and power consumption. The selection of core and migration of tasks prevents the system from reaching its maximum energy utilization while effectively using the dynamic power management (DPM) policy. Increase in the execution of tasks the temperature and utilization factor on-chip increases that dissipate more power. The proposed approach migrates such tasks to the core that produces less heat and consumes less power by distributing the load on other cores to lower the temperature and optimizes the duration of idle and sleep times across multiple CPUs. The performance of the EA-EDF algorithm was evaluated by an extensive set of experiments, where excellent results were reported when compared to other current techniques, the efficacy of the proposed methodology reduces the power and energy consumption by 4.3%–4.7% on a utilization of 6%, 36% & 46% at 520 & 624 MHz operating frequency when particularly in comparison to other energy-aware methods for MPSoCs. Tasks are running and accurately scheduled to make an energy-efficient processor by controlling and managing the thermal effects on-chip and optimizing the energy consumption of MPSoCs.
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Research context

OpenAlex topics: Parallel Computing and Optimization Techniques · Interconnection Networks and Systems · Advanced Memory and Neural Computing

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References (30)

Show source-provided references
1. CPU-GPU-memory DVFS for power-efficient MPSoC in mobile cyber physical systems10.3390/fi14030091 ↗
2. A high performance scalable fuzzy based modified asymmetric heterogene multiprocessor system on vhip (AHt-MPSOC) reconfigurable architecture10.3233/JIFS-189737 ↗
3. Collaborative heterogeneity-aware os scheduler for asymmetric multicore processors10.1109/TPDS.2020.3045279 ↗
4. Leakage-aware predictive thermal management for multicore systems using echo state network10.1109/TCAD.2019.2915316 ↗
5. A dynamic cache-partition schedulability analysis for partitioned scheduling on multicore real-time systems10.1109/LOCS.2020.3013660 ↗
6. Accelerating concurrent priority scheduling using adaptive in-hardware task distribution in multicores10.1109/LCA.2020.3045670 ↗
7. Thread isolation to improve symbiotic scheduling on smt multicore processors10.1109/TPDS.2019.2934955 ↗
8. Chip-package-board reliability of system-in-package using laminate chip embedding technology based on cu leadframe10.1109/TCPMT.2019.2955822 ↗
9. Power consumption analysis in static cmosgates
10. A new efficient multi-task applications mapping for three-dimensional network-on-chip based MPSoC
11. A high performance scalable fuzzy based modified asymmetric heterogene multiprocessor system on chip (AHt-MPSOC) reconfigurable architecture10.3233/JIFS-189737 ↗
12. A power management circuit compatible with Ti smart reflex and xilinx ultrascale MPSoC dual voltage mechanism
13. Decomposition-based multi-objective optimization for energy-aware distributed hybrid flow shop scheduling with multiprocessor tasks10.26599/TST.2021.9010007 ↗
14. An energy and performance efficient dvfs scheme for irregular parallel divide-and-conquer algorithms on the intel scc
15. Distributed-memory load balancing with cyclic token-based work-stealing applied to reverse time migration10.1109/ACCESS.2019.2939100 ↗
16. Dynamic scheduling of real-time tasks in heterogeneous multicore systems10.1109/LES.2018.2846666 ↗
17. Expected energy optimization for real-time multiprocessor socs running periodic tasks with uncertain execution time10.1109/TSUSC.2018.2853621 ↗
18. Online tuning of dynamic power management for efficient execution of interactive workloads
19. MPSoC based dynamic power management in wireless sensor networks
20. Dynamic power management for multidomain system-on-chip platforms: An optimal control approach10.1145/2504904 ↗
21. Big data driven hierarchical digital twin predictive remanufacturing paradigm: Architecture, control mechanism, application scenario and benefits
22. System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia
23. Dynamic power and thermal management of noc-based heterogeneous mpsocs
24. Power management strategies in energy-harvesting wireless sensor networks
25. Recent progress in organic field-effect transistor-based integrated circuits10.1002/pol.20210457 ↗
26. Vehicle re-odentification model based on optimized densenet121 with joint loss10.32604/cmc.2021.016560 ↗
27. A Real-time cutting model based on finite element and order reduction10.32604/csse.2022.024950 ↗
28. Simulation of real time multiprocessor static scheduling algorithms10.26634/jes.7.1.15134 ↗
29. Storm a simulation tool for real-time multiprocessor scheduling evaluation
30. Analysis and optimization of mpsoc reliability10.1166/jolpe.2006.007 ↗