Design enablement of low-cost stitching in high NA EUV patterning

BackgroundHigh-numerical aperture extreme ultraviolet (High NA EUV) lithography, with a higher numerical aperture (NA = 0.55), enables finer feature printing than the previous low-numerical aperture extreme ultraviolet (Low-NA EUV) (NA = 0.33). However, it introduces anamorphic imaging, creating a smaller exposure field (16.5 mm×26 mm). To support larger chip designs, two half-field exposures must be stitched, which can cause shape alignment issues at the boundary, requiring exclusion zones for manufacturability.AimWe aim to evaluate and reduce the performance and design overhead of implementing a physical design (PD) methodology that supports an overlay error-tolerant, stitch-aware design for High NA EUV lithography.ApproachThe proposed method uses exclusion zones to prevent stitching issues in critical High NA EUV layers, whereas full-field (Low-NA or deep ultraviolet) layers bridge connections across the stitch. For single-core designs, the methodology involves placing blockages on High NA layers. For multi-core designs, a more comprehensive approach is used, involving stitch-aware floorplanning and a stitch boundary placement optimizer to minimize insertion costs such as macro redesign or floorplan changes.ResultsFor single-core designs, the exclusion-zone-based methodology results in an estimated 1% performance loss. In multi-core designs, the optimized floorplanning approach effectively accommodates the exclusion zone with minimal additional design cost, demonstrating the practicality of the proposed PD methodology.ConclusionsThe proposed stitch-aware PD methodology offers a simple and robust solution to the challenges of High NA EUV half-field stitching. By strategically managing stitch zone placement and routing, the approach ensures manufacturability and yield without significant performance degradation, making it suitable for both single-core and multi-core chip designs in advanced nodes.