Lithography hotspot correction on post-OPC layout using generative adversarial networks

BackgroundSuboptimal layout geometries following optical proximity correction (OPC) may lead to lithography hotspots, adversely impacting wafer yield. Conventional hotspot correction techniques, including rule-based and model-based methods, frequently fall short due to their time-intensive nature and limitations in model accuracy.AimWe present a lithography hotspot correction methodology employing generative adversarial networks (GANs) to refine hotspot geometries and improve lithographic fidelity of design layouts. In addition, the proposed approach seeks to enhance correction efficiency relative to traditional methods.ApproachA hotspot correction model is developed based on various lithography rule check (LRC) hotspot types. A pix2pix GAN model is trained using paired post-OPC layout images and simulated after-development inspection contour images generated via an LRC tool. Hotspot-free contours serve as input to generate predicted hotspot-free mask layouts, subsequently converted to polygonal formats and integrated into original masks for LRC validation. Transfer learning is further employed to generalize the model to additional hotspot patterns. The approach is evaluated using both simulation and wafer datasets, demonstrating improvements in critical dimension (CD) accuracy and reductions in training duration.ResultsExperimental outcomes confirm that the proposed methodology efficiently corrects lithography hotspots, reducing wafer CD error below 1 nm, with maximum error reduction reaching 97.92%. In addition, the depth of focus at 4% exposure latitude improves by 27.66% while model training time is reduced to 8% of that required by conventional approaches.ConclusionsThe presented method achieves accurate, efficient hotspot correction through localized mask feature modification without introducing additional hotspots, thereby enhancing wafer yield and manufacturing throughput.