Interfacial layer suppression in ZrO2/TiN stack structured capacitors via atomic layer deposition

Controlling the formation of interfacial layers in dynamic random-access memory (DRAM) capacitors is crucial because it affects electrical performance, such as increasing the equivalent oxide thickness. This study investigates the formation of an interfacial layer during atomic layer deposition (ALD) of ZrO 2 on TiN electrodes and examines its influence on electrical properties. Utilizing O 3 and H 2 O as oxygen sources, we quantitatively identified notable differences in the formation of the interfacial TiO x layer. Using O 3 results in a thicker TiO x layer with fewer impurities, which lowers the leakage current, whereas H 2 O creates a thinner interfacial layer with higher impurity levels, leading to an increased leakage current. To optimize these effects, we developed a two-step ALD process that combines both oxygen sources, reducing the interfacial layer thickness while maintaining low leakage currents. This approach significantly improved the electrical performance of capacitors. Furthermore, similar results were observed for HfO 2 /TiN systems, suggesting that our findings are broadly applicable to high-k dielectric materials.