High-energy heavy ion testing of VLSI devices for single event upsets and latch up
Source abstract
Abstract
Several very large scale integrated (VLSI) devices which are not available in radiation hardened version are still required to be used in spacecraft systems. Thus these components need to be tested for highenergy heavy ion irradiation to find out their tolerance and suitability in specific space applications. This paper describes the high-energy heavy ion radiation testing of VLSI devices for single event upset (SEU) and single event latch up (SEL). The experimental set up employed to produce low flux of heavy ions viz. silicon (Si), and silver (Ag), for studying single event effects (SEE) is briefly described. The heavy ion testing of a few VLSI devices is performed in the general purpose scattering chamber of the Pelletron facility, available at Nuclear Science Centre, New Delhi. The test results with respect to SEU and SEL are discussed.
Source: openaire · Quality: candidate unverified · Source record ↗
Research context
OpenAlex topics: Radiation Effects in Electronics · Integrated Circuits and Semiconductor Failure Analysis · VLSI and Analog Circuit Testing
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (8)
Show source-provided references
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