Reconfigurable SmartNICs: A Comprehensive Review of FPGA Shells and Heterogeneous Offloading Architectures
Source abstract
Abstract
Smart Network Interface Cards (SmartNICs) represent a paradigm shift in system architecture by offloading packet processing and selected application logic from the host CPU to the network interface itself. This architectural evolution reduces end-to-end latency toward the physical limits of Ethernet while simultaneously decreasing CPU and memory bandwidth utilization. The current ecosystem comprises three principal categories of devices: (i) conventional fixed-function NICs augmented with limited offload capabilities; (ii) ASIC-based Data Processing Units (DPUs) that integrate multi-core processors and dedicated protocol accelerators; and (iii) FPGA-based SmartNIC shells—reconfigurable hardware frameworks that provide PCIe connectivity, DMA engines, Ethernet MAC interfaces, and control firmware, while exposing programmable logic regions for user-defined accelerators. This article provides a comparative survey of representative platforms from each category, with particular emphasis on open-source FPGA shells. It examines their architectural capabilities, programmability models, reconfiguration mechanisms, and support for GPU-centric peer-to-peer datapaths. Furthermore, it investigates the associated software stack, encompassing kernel drivers, user-space libraries, and control APIs. This study concludes by outlining open research challenges and future directions in RDMA-oriented data preprocessing and heterogeneous SmartNIC acceleration.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Software-Defined Networks and 5G · Network Packet Processing and Optimization · Network Time Synchronization Technologies
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Department of Electronic Devices, Circuits and Architectures, Faculty of Electronics, Telecommunication and Information Technology, National University of Science and Technology POLITEHNICA Bucharest, 060042 Bucharest, Romania
References (71)
Show source-provided references
1. A New Golden Age for Computer Architecture10.1145/3282307 ↗
2. Firestone, D., Putnam, A., Mundkur, S., Chiou, D., Dabagh, A., Andrewartha, M., Angepat, H., Bhanu, V., Caulfield, A., and Chung, E. (2018, January 9–11). Azure Accelerated Networking: SmartNICs in the Public Cloud. Proceedings of the 15th USENIX Symposium on Networked Systems Design and Implementation (NSDI 18), Renton, WA, USA.
3. Fast Packet Processing with eBPF and XDP: Concepts, Code, Challenges, and Applications
4. Luizelli, M.C., Vogt, F., Matos, G.M.V., Cordeiro, W., Schaeffer Filho, A.E., Schwarz, M., Verdi, F.L., and Rothenberg, C.E. (2024). SmartNICs: The Next Leap in Networking. Minicursos do XLII Simpósio Brasileiro de Redes de Computadores e Sistemas Distribuídos (SBRC), Sociedade Brasileira de Computação.10.5753/sbc.15408.7.2 ↗
5. Lin, W., Shan, Y., Kosta, R., Krishnamurthy, A., and Zhang, Y. (2024, January 3–5). SuperNIC: An FPGA-Based, Cloud-Oriented SmartNIC. Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA ’24), Monterey, CA, USA.10.1145/3626202.3637564 ↗
6. Sukhwani, B., Kapur, M., Ohmacht, A., Schour, L., Ohmacht, M., Ward, C., Haymes, C., and Asaad, S. (2023, January 12–14). Janus: An Experimental Reconfigurable SmartNIC with P4 Programmability and SDN Isolation. Proceedings of the ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA ’23), Monterey, CA, USA.10.1145/3543622.3573158 ↗
7. A Survey on In-Network Computing: Programmable Data Plane and Technology Specific Applications10.1109/COMST.2022.3213237 ↗
8. A Survey of End-System Optimizations for High-Speed Networks
9. Arrakis: The Operating System Is the Control Plane
10. Survey on Ethernet RDMA Network Interface Card
11. Qiu, Y., Xing, J., Hsu, K.-F., Kang, Q., Liu, M., Narayana, S., and Chen, A. (2021, January 26–29). Automated SmartNIC Offloading Insights for Network Functions. Proceedings of the ACM Symposium on Operating Systems Principles (SOSP), Virtual.10.1145/3477132.3483583 ↗
12. In-Network Machine Learning Using Programmable Network Devices: A Survey10.1109/COMST.2023.3344351 ↗
13. Sada, M.F., Graham, J.J., Tatineni, M., Mishin, D., DeFanti, T.A., and Würthwein, F. (2025, January 20–24). Real-Time In-Network Machine Learning on P4-Programmable FPGA SmartNICs with Fixed-Point Arithmetic and Taylor. Proceedings of the Practice and Experience in Advanced Research Computing (PEARC), Columbus, OH, USA.10.1145/3708035.3736086 ↗
14. Intel Corporation (2025, November 07). Intel® 82559 Fast Ethernet PCI Bus LAN Controller Datasheet. Available online: https://www.intel.cn/content/dam/doc/datasheet/82559er-fast-ethernet-pci-datasheet.pdf.
15. Microsoft Corporation (2002). Large Send Offload (LSO) in Microsoft Windows, Microsoft Corporation.
16. Linux Kernel Community (2025, November 07). Generic Receive Offload (GRO)—Linux Kernel Documentation. Available online: https://docs.kernel.org/networking/segmentation-offloads.html.
17. Microsoft Corporation (2004). Scalable Networking: Eliminating the Receive Processing Bottleneck—Introducing RSS, Microsoft Corporation.
18. PCI-SIG (2010). PCI Express Base Specification 3.0; Annex 6: Message Signalled Interrupts eXtended (MSI-X), PCI-SIG.
19. PCI-SIG (2010). Single Root I/O Virtualization and Sharing Specification 1.1, PCI-SIG.
20. Intel Corporation (2025, November 07). Intel Virtual Machine Device Queues (VMDq); Technical Brief 324419-001. Available online: https://www.intel.sg/content/dam/www/public/us/en/documents/white-papers/vmdq-technology-paper.pdf.
21. Høiland-Jørgensen, T., Brouer, J.D., Borkmann, D., Fastabend, J., Ahern, D., and Graf, T. (2018, January 20–25). The eXpress Data Path: Fast Programmable Packet Processing in the Operating System Kernel. Proceedings of the SIGCOMM, Budapest, Hungary.10.1145/3281411.3281443 ↗
22. Linux Foundation (2021). eBPF—Extended Berkeley Packet Filter Project Overview, Linux Foundation.
23. Intel Corporation (2020). Intel Ethernet Controller E810 Series Product Brief, Intel Corporation.
24. NVIDIA Networking (2022). NVIDIA ConnectX-6 Dx Adapter Card Data Sheet, NVIDIA Networking.
25. Toward low CPU usage and efficient DPDK communication in a cluster10.1007/s11227-021-03942-x ↗
26. Parola, F., Procopio, R., and Risso, F. (2021, January 6–10). Assessing the Performance of XDP and AF_XDP Based Network Functions in Edge Data Center Scenarios. Proceedings of the ACM Conference on emerging Networking EXperiments and Technologies (CoNEXT), Virtual.10.1145/3485983.3493352 ↗
27. The I/O Driven Server: From SmartNICs to Data Movement Controllers10.1145/3649171.3649174 ↗
28. Kashyap, A., Li, Y., Ng, D., and Lu, X. (2025, January 8–11). Understanding the Idiosyncrasies of Emerging BlueField DPUs. Proceedings of the International Conference on Supercomputing (ICS), Salt Lake City, UT, USA.10.1145/3721145.3725780 ↗
29. NVIDIA Networking (Mellanox Technologies) (2026, January 10). NVIDIA BlueField-3 DPU Product Brief. Available online: https://resources.nvidia.com/en-us-accelerated-networking-resource-library/datasheet-nvidia-bluefield?lx=LbHvpR&topic=networking-cloud/.
30. Marvell Technology Group Ltd (2024). Marvell OCTEON® 10 CN106xx Family: Infrastructure Processor, Marvell Technology Group Ltd.
31. AMD Pensando Systems (2023). AMD Pensando DSC-2 “Elba” Data Processing Unit, AMD Pensando Systems.
32. Broadcom Inc (2022). Broadcom Stingray® BCM5883 Series SmartNIC SoC—Product Data Sheet, Broadcom Inc.
33. Intel Corporation (2023). Intel Infrastructure Processing Unit E2100 (“Mount Evans”) Architecture Overview, Intel Corporation.
34. Kubálek, J., Cabal, J., Špinler, M., and Iša, R. (2021, January 9–12). DMA Medusa: A Vendor-Independent FPGA-Based Architecture for 400 Gbps DMA Transfers. Proceedings of the IEEE FCCM 2021, Orlando, FL, USA.10.1109/FCCM51124.2021.00045 ↗
35. Cabal, J., Sikora, J., Friedl, Š, Špinler, M., and Kořenek, J. (2022, January 29–31). FPL Demo: 400G FPGA Packet Capture Based on Network Development Kit. Proceedings of the FPL 2022, Belfast, UK.10.1109/FPL57034.2022.00090 ↗
36. Li, J., Sun, Z., Yan, J., Yang, X., Jiang, Y., and Quan, W. (2019). DrawerPipe: A Reconfigurable Pipeline for Network Processing on FPGA-Based SmartNIC. Electronics, 9.10.3390/electronics9010059 ↗
37. He, Z., Korolija, D., and Alonso, G. (September, January 30). EasyNet: 100 Gbps Network for HLS. Proceedings of the 31st International Conference on Field-Programmable Logic and Applications (FPL), Dresden, Germany.
38. Forencich, A., Snoeren, A.C., Porter, G., and Papen, G. (2020, January 3–6). Corundum: An Open-Source 100-Gbps NIC. Proceedings of the IEEE 28th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Fayetteville, AR, USA.10.1109/FCCM48280.2020.00015 ↗
39. Li, B., Tan, K., Luo, L., Peng, Y., Luo, R., Xu, N., Xiong, Y., Cheng, P., and Chen, E. (2016, January 22–26). ClickNP: Highly Flexible and High Performance Network Processing with Reconfigurable Hardware. Proceedings of the ACM SIGCOMM Conference, Florianópolis, Brazil.10.1145/2934872.2934897 ↗
40. Ramhorst, B., Korolija, D., Heer, M., Dann, J., Liu, L., and Alonso, G. (2025, January 13–16). Coyote v2: Raising the Level of Abstraction for Data Center FPGAs. Proceedings of the ACM SIGOPS 31st Symposium on Operating Systems Principles, Seoul, Republic of Korea.10.1145/3731569.3764845 ↗
41. Grant, S., Yelam, A., Bland, M., and Snoeren, A.C. (2020, January 10–14). SmartNIC Performance Isolation with FairNIC: Programmable Networking for the Cloud. Proceedings of the ACM SIGCOMM 2020, Virtual.10.1145/3387514.3405895 ↗
42. Zhou, Y., Wilkening, M., Mickens, J., and Yu, M. (2024, January 22–25). SmartNIC Security Isolation in the Cloud with S-NIC. Proceedings of the EuroSys 2024, Athens, Greece.10.1145/3627703.3650071 ↗
43. AMD Inc. (2025, November 07). OpenNIC Shell for Xilinx Alveo. Available online: https://github.com/Xilinx/open-nic-shell.
44. P4-enabled Smart NIC: Enabling Sliceable and Service-Driven Optical Data Centres10.1109/JLT.2020.2966517 ↗
45. Zhong, G., Kolekar, A., Amornpaisannon, B., Choi, I., Javaid, H., and Baldi, M. (2023). A Primer on RecoNIC: RDMA-enabled Compute Offloading on SmartNIC. arXiv.
46. Pan, L., Guo, S., and Zhang, M. (2024). Design of a Fast and Scalable FPGA-Based Bitmap for RDMA Networks. Electronics, 13.10.3390/electronics13244900 ↗
47. Taming the Elephants: Affordable Flow Length Prediction in the Data Plane10.1145/3649473 ↗
48. ecoNIC: SmartNIC-assisted Power Management for Networking Workloads in Linux Servers10.1016/j.micpro.2025.105209 ↗
49. Wang, Z., Huang, H., Zhang, J., Wu, F., and Alonso, G. (2022, January 11–13). FpgaNIC: An FPGA-Based Versatile 100Gb SmartNIC for GPUs. Proceedings of the 2022 USENIX Annual Technical Conference (USENIX ATC 22), Carlsbad, CA, USA.
50. Multi-Tenant Cloud FPGA: A Survey on Security, Trust and Privacy
51. (2015). IEEE Recommended Practice for Encryption and Management of Electronic Design Intellectual Property (IP) (Standard No. IEEE Std 1735-2014).
52. NVIDIA Corporation (2025, November 07). NVIDIA GPUDirect RDMA Application Note v4.0. Available online: https://docs.nvidia.com/cuda/gpudirect-rdma/.
53. Advanced Micro Devices Inc. (2025, November 07). AMD/Xilinx QDMA Subsystem—Product Guide. Available online: https://docs.amd.com/r/en-US/pg302-qdma.
54. PCI-SIG (2025, January 10). PCIe 6.0 Electrical Compliance Update. Proceedings of the PCI-SIG Developers Conference, Mohiuddin Mazumber, India.
55. CXL Consortium (2025, November 07). Compute Express Link (CXL) Specification, Version 3.0. Available online: https://computeexpresslink.org/wp-content/uploads/2024/02/CXL-3.0-Specification.pdf.
56. Intel Corporation (2025, November 07). Intel Agilex 2 FPGA Product Brief. Available online: https://www.altera.com/products/fpga/agilex/7.
57. AMD/Xilinx (2025). Versal Premium ACM, AMD/Xilinx.
58. Meta Platforms Inc (2025, November 07). RoCE Networks for Distributed AI Training at Scale. Available online: https://engineering.fb.com/2024/08/05/data-center-engineering/roce-network-distributed-ai-training-at-scale/.
59. Li, B., Ruan, Z., Xiao, W., Lu, Y., Xiong, Y., Putnam, A., Chen, E., and Zhang, L. (2017, January 28–31). KV-Direct: High-Performance In-Memory Key-Value Store with Programmable NIC. Proceedings of the 26th Symposium on Operating Systems Principles (SOSP ’17), Shanghai, China.10.1145/3132747.3132756 ↗
60. NVIDIA Networking (2023). NVIDIA ConnectX-6 Dx Programmer’s Reference Manual, NVIDIA Networking.
61. Pontarelli, S., Bifulco, R., Bonola, M., Cascone, C., Spaziani, M., Bruschi, V., Sanvito, D., Siracusano, G., Capone, A., and Honda, M. (2019, January 26–28). FlowBlaze: Stateful Packet Processing in Hardware. Proceedings of the 16th USENIX Symposium on Networked Systems Design and Implementation (NSDI 19), Boston, MA, USA.
62. Sapio, A., Canini, M., Ho, C.-Y., Nelson, J., Kalnis, P., Kim, C., Krishnamurthy, A., Moshref, M., Ports, D., and Richtarik, P. (2021, January 12–14). Scaling Distributed Machine Learning with In-Network Aggregation. Proceedings of the 18th USENIX Symposium on Networked Systems Design and Implementation (NSDI 21), Virtual.
63. A Survey on Architectures, Hardware Acceleration and Challenges for In-Network Computing
64. Xing, J., Qiu, Y., Hsu, K.-F., Kang, Q., Liu, M., Narayana, S., and Chen, A. (2023, January 10–14). Unleashing SmartNIC Packet Processing Performance in P4. Proceedings of the ACM SIGCOMM Conference, New York, NY, USA.10.1145/3603269.3604882 ↗
65. Exploring Data Plane Updates on P4 Switches with P4Runtime10.1016/j.comcom.2024.06.020 ↗
66. Linux Kernel Community (2024). mlx5—Mellanox/NVIDIA Ethernet Driver Documentation, Linux Kernel Community.
67. Intel Corporation (2023). IDPF: Intel Distributed Device Function Driver, Intel Corporation.
68. Netdev Community (2025, November 07). XDP: High-Performance Packet Processing in Linux. Available online: https://xdp-project.net.
69. DPDK Project (2025, November 07). Data Plane Development Kit (DPDK) 23.11. Available online: https://www.dpdk.org.
70. NVIDIA Corporation (2026, January 21). DOCA Programming Guide (DOCA SDK v2.5.5). NVIDIA Docs. Available online: https://docs.nvidia.com/doca/sdk/DOCA-Programming-Guide/index.html.
71. AMD Pensando (2024). Pensando DSC-2 System Software Overview, AMD Pensando.