A Method for Grading Failure Rates Within the Dynamic Effective Space of Integrated Circuits After Testing
Source abstract
Abstract
Integrated circuits that pass testing still have quality differences, thus making grading necessary. Traditional grading methods rely on static testing and electrical measurements, which are challenging to achieve precise grading, time-consuming, and costly. A new grading method based on the failure rate within a dynamically effective space is proposed. This method dynamically adjusts the evaluation space and uses an exponential decay function to calculate the influence weight of each neighboring chip on the evaluated chip, thereby computing the weighted failure rate of the evaluated chip and quantitatively grading the chips after wafer testing based on the scores. Experiments show that this method not only accurately captures quality differences and ensures grading accuracy but also significantly improves grading efficiency.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Integrated Circuits and Semiconductor Failure Analysis · VLSI and Analog Circuit Testing · Non-Destructive Testing Techniques
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
School of Electronic Engineering & Intelligent Manufacturing, Anqing Normal University, Anqing 246133, China
Graduate School of Computer Science and Systems Engineering, Kyushu Institute of Technology, Iizuka-shi 820-8502, Japan
Funding
National Natural Science Foundation of China · National and Local Joint Engineering Laboratory of RF Integration and Micro-Assembly Technology · State Key Laboratory of Integrated Chipls and Systems · Natural Science Research Project of Anhui Educational Committee
References (35)
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