journal article·2024-02-26Open access

JITScanner: Just-in-Time Executable Page Check in the Linux Operating System

Pasquale Caporaso, Giuseppe Bianchi, Francesco Quaglia

Applied Sciences· Volume 14· Issue 5

Abstract

Modern malware poses a severe threat to cybersecurity, continually evolving in sophistication. To combat this threat, researchers and security professionals continuously explore advanced techniques for malware detection and analysis. Dynamic analysis, a prevalent approach, offers advantages over static analysis by enabling observation of runtime behavior and detecting obfuscated or encrypted code used to evade detection. However, executing programs within a controlled environment can be resource-intensive, often necessitating compromises, such as limiting sandboxing to an initial period. In our article, we propose an alternative method for dynamic executable analysis: examining the presence of malicious signatures within executable virtual pages precisely when their current content, including any updates over time, is accessed for instruction fetching. Our solution, named JITScanner, is developed as a Linux-oriented package built upon a Loadable Kernel Module (LKM). It integrates a user-level component that communicates efficiently with the LKM using scalable multi-processor/core technology. JITScanner’s effectiveness in detecting malware programs and its minimal intrusion in normal runtime scenarios have been extensively tested, with the experiment results detailed in this article. These experiments affirm the viability of our approach, showcasing JITScanner’s capability to effectively identify malware while minimizing runtime overhead.
Source: crossref · Quality: baseline

Research context

OpenAlex topics: Advanced Malware Detection Techniques · Software Testing and Debugging Techniques · Security and Verification in Computing

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

Affiliations

CNIT Natl. Network Assessment and Monitoring Lab, Università di Roma Tor Vergata, 00133 Rome, Italy

Dipartimento di Ingegneria Civile e Ingegneria Informatica (DICII), Università di Roma Tor Vergata, 00133 Rome, Italy

Dipartimento di Ingegneria Elettronica (DIE), Università di Roma Tor Vergata, 00133 Rome, Italy

Funding

ECS Rome Technopole CUP N.

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