Multi-Layer QCA Reversible Full Adder-Subtractor Using Reversible Gates for Reliable Information Transfer and Minimal Power Dissipation on Universal Quantum Computer
Source abstract
Abstract
The effects of quantum mechanics dominate nanoscale devices, where Moore’s law no longer holds true. Additionally, with the recent rapid development of quantum computers, the development of reversible gates to overcome the problems of energy and information loss and the nano-level quantum-dot cellular automata (QCA) technology to efficiently implement them are in the spotlight. In this study, a full adder-subtractor, a core operation of the arithmetic and logic unit (ALU), the most important hardware device in computer operations, is implemented as a circuit capable of reversible operation using QCA-based reversible gates. The proposed circuit consists of one reversible QCA gate and two Feynman gates and is designed as a multi-layer structure for efficient use of area and minimization of delay. The proposed circuit is tested on QCADesigner 2.0.3 and QCADesigner-E 2.2 and shows the best performance and lowest energy dissipation. In particular, it shows tremendous improvement rates of 180% and 562% in two representative standard design cost indicators compared to the best existing studies, and also shows the highest circuit average output polarization.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Quantum-Dot Cellular Automata · Advanced Memory and Neural Computing · Quantum Computing Algorithms and Architecture
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Department of Convergence Science, Kongju National University, Gongju 32588, Republic of Korea
References (52)
Show source-provided references
1. An insight into beyond CMOS Next generation computing using quantum-dot cellular automata nanotechnology
2. Moore, G.E. (2003, January 13–13). No exponential is forever: But “Forever” can be delayed! [semiconductor industry]. Proceedings of the 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers, ISSCC, San Francisco, CA, USA.
3. Dennard, R.H., Gaensslen, F.H., Kuhn, L., and Yu, H.N. (1972, January 4–6). Design of micron MOS switching devices. Proceedings of the International Electron Devices Meeting, Washington, DC, USA.10.1109/IEDM.1972.249198 ↗
4. Roadmap for 22 nm and beyond10.1016/j.mee.2009.03.129 ↗
5. Irreversibility and heat generation in the computing process10.1147/rd.53.0183 ↗
6. Logical reversibility of computation10.1147/rd.176.0525 ↗
7. A quantum federated learning framework for classical clients10.1007/s11433-023-2337-2 ↗
8. Toffoli, T. (1980). Reversible computing. International Colloquium on Automata, Languages, and Programming, Springer.10.1007/3-540-10003-2_104 ↗
9. Elementary gates for quantum computation10.1103/PhysRevA.52.3457 ↗
10. Conservative Logic10.1007/BF01857727 ↗
11. Quantum Mechanical Computers10.1364/ON.11.2.000011 ↗
12. Reversible logic and quantum computers10.1103/PhysRevA.32.3266 ↗
13. Sen, B., Adak, T., Anand, A.S., and Sikdar, B.K. (2011, January 21–24). Synthesis of reversible universal QCA gate structure for energy efficient digital design. Proceedings of the IEEE Region 10 Conference TENCON, Bali, Indonesia.10.1109/TENCON.2011.6129222 ↗
14. Realizing Reversible Computing in QCA Framework Resulting in Efficient Design of Testable ALU10.1145/2629538 ↗
15. A new approach of presenting universal reversible gate in nanoscale
16. Design and Implementation of an Efficient Reversible Comparator Using TR Gate10.4236/cs.2016.79223 ↗
17. Towards ultra-efficient QCA reversible circuits10.1016/j.micpro.2016.09.015 ↗
18. Efficient Synthesis of Reversible Circuits Using Quantum Dot Cellular Automata10.1109/ACCESS.2021.3083507 ↗
19. A device architecture for computing with quantum dots10.1109/5.573740 ↗
20. Srivastava, S., Sarkar, S., and Bhanja, S. (2006, January 17–20). Power dissipation bounds and models for quantum-dot cellular automata circuits. Proceedings of the 2006 Sixth IEEE Conference on Nanotechnology, Cincinnati, OH, US.10.1109/NANO.2006.247655 ↗
21. Estimation of upper bound of power dissipation in QCA circuits10.1109/TNANO.2008.2005408 ↗
22. An Ultra-Low Cost Multilayer RAM in Quantum-Dot Cellular Automata
23. A unique three-layer full adder in quantum-dot cellular automata10.1016/j.compeleceng.2020.106735 ↗
24. BCD Adder Designs Based on Three-Input XOR and Majority Gates
25. Multibit Full Comparator Logic in Quantum-Dot Cellular Automata
26. An energy efficient design of a multi-layered crossover based 3:8 decoder using quantum-dot cellular automata10.1016/j.heliyon.2022.e11643 ↗
27. Defects of quantum dot cellular automata computing devices: An extensive review, evaluation, and future directions10.1016/j.micpro.2023.104912 ↗
28. Quad-functioning Parity Layout for Nanocomputing: A QCA Design10.1016/j.nancom.2024.100525 ↗
29. A novel controllable inverter and adder/subtractor in quantum-dot cellular automata using cell interaction based XOR gate10.1016/j.mee.2019.111197 ↗
30. Design of high-performance QCA incrementer/decrementer circuit based on adder/subtractor methodology10.1016/j.micpro.2019.102927 ↗
31. Carry save adder and carry look ahead adder using inverter chain based coplanar QCA full adder for low energy dissipation10.1016/j.mee.2019.03.015 ↗
32. Novel 8-bit reversible full adder/subtractor using a QCA reversible gate10.1007/s10825-017-0963-1 ↗
33. Design and analysis of efficient QCA reversible adders10.1007/s11227-018-2683-0 ↗
34. Optimization of the area efficiency and robustness of a QCA-based reversible full adder10.1007/s10825-019-01369-5 ↗
35. Design of an ultra-efficient reversible full adder-subtractor in quantum-dot cellular automata10.1016/j.ijleo.2017.06.024 ↗
36. Modular Design of Ultra-Efficient Reversible Full Adder-Subtractor in QCA with Power Dissipation Analysis10.1007/s10773-018-3806-3 ↗
37. Vahabi, M., Rahimi, E., Lyakhov, P., Bahar, A.N., Wahid, K.A., and Otsuki, A. (2023). Novel Quan-tum-Dot Cellular Automata-Based Gate Designs for Efficient Reversible Computing. Sustainability, 15.10.3390/su15032265 ↗
38. Lent, C.S., Tougaw, P.D., and Porod, W. (1994, January 17–20). Quantum cellular automata: The physics of computing with arrays of quantum dot molecules. Proceedings of the Workshop on Physics and Computation, PhysComp ‘94, Dallas, TX, USA.
39. Logical devices implemented using quantum cellular automata
40. Jeon, J.C. (2023). “Multi-Layer QCA Shift Registers and Wiring Structure for LFSR in Stream Cipher with Low Energy Dissipation in Quantum Nanotechnology. Electronics, 12.10.3390/electronics12194093 ↗
41. Design and simulation of Full-Subtractor based on Quantum-Dot cellular automata technology10.1016/j.aeue.2023.154927 ↗
42. Utilizing charge reconfigurations of quantum-dot cells in building blocks to design nanoelectronic adder circuits10.1016/j.compeleceng.2020.106712 ↗
43. QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata10.1109/TNANO.2003.820815 ↗
44. (2024, August 18). QCADesigner-E. Available online: https://github.com/FSillT/QCADesigner-E.
45. A First Step toward Cost Functions for Quantum-Dot Cellular Automata Designs
46. Seo, D.K., and Jeon, J.C. (2023). QCA-Based Secure RAM Cell Structure Using Logic Transformation and Cell Interaction with Signal Reliability and Energy Dissipation in Quantum Computing. Appl. Sci., 13.10.3390/app13189998 ↗
47. Jeon, J.C. (2024). Quantum-Dot CA-Based Fredkin Gate and Conservative D-latch for Reliability-Based Information Transmission on Reversible Computing. Electronics, 13.10.3390/electronics13142872 ↗
48. Power gain and dissipation in quantum-dot cellular automata10.1063/1.1421217 ↗
49. An Energy-Aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata10.1109/TCAD.2018.2789782 ↗
50. Low-complexity QCA universal shift register design using multiplexer and D flip-flop based on electronic correlations10.1007/s11227-019-02962-y ↗
51. Designing nanotechnology QCA–multiplexer using majority function-based NAND for quantum computing10.1007/s11227-020-03341-8 ↗
52. Average out-put polarization dataset for signifying the temperature influence for QCA designed reversible logic circuits10.1016/j.dib.2018.05.009 ↗