Efficient Parallel Implementation of CTR Mode of ARX-Based Block Ciphers on ARMv8 Microcontrollers
Source abstract
Abstract
With the advancement of 5G mobile telecommunication, various IoT (Internet of Things) devices communicate massive amounts of data by being connected to wireless networks. Since this wireless communication is vulnerable to hackers via data leakage during communication, the transmitted data should be encrypted through block ciphers to protect the data during communication. In addition, in order to encrypt the massive amounts of data securely, it is essential to apply one of secure mode of operation. Among them, CTR (CounTeR) mode is the most widely used in industrial applications. However, these IoT devices have limited resources of computing and memory compared to typical computers, so that it is challenging to process cryptographic algorithms that have computation-intensive tasks in IoT devices at high speed. Thus, it is required that cryptographic algorithms are optimized in IoT devices. In other words, optimizing cryptographic operations on these IoT devices is not only basic but also an essential effort in order to build secure IoT-based service systems. For efficient encryption on IoT devices, even though several ARX (Add-Rotate-XOR)-based ciphers have been proposed, it still necessary to improve the performance of encryption for smooth and secure IoT services. In this article, we propose the first parallel implementations of CTR mode of ARX-based ciphers: LEA (Lightweight Encryption Algorithm), HIGHT (high security and light weight), and revised CHAM on the ARMv8 platform, a popular microcontroller in various IoT applications. For the parallel implementation, we propose an efficient data parallelism technique and register scheduling, which maximizes the usage of vector registers. Through proposed techniques, we process the maximum amount of encryption simultaneously by utilizing all vector registers. Namely, in the case of HIGHT and revised CHAM-64/128 (resp. LEA, revised CHAM-128/128, and CHAM-128/256), we can execute 48 (resp. 24) encryptions simultaneously. In addition, we optimize the process of CTR mode by pre-computing and using the intermediate value of some initial rounds by utilizing the property that the nonce part of CTR mode input is fixed during encryptions. Through the pre-computation table, CTR mode is optimized up until round 4 in LEA, round 5 in HIGHT, and round 7 in revised CHAM. With the proposed parallel processing technique, our software provides 3.09%, 5.26%, and 9.52% of improved performance in LEA, HIGHT, and revised CHAM-64/128, respectively, compared to the existing parallel works in ARM-based MCU. Furthermore, with the proposed CTR mode optimization technique, our software provides the most improved performance with 8.76%, 8.62%, and 15.87% in LEA-CTR, HIGHT-CTR, and revised CHAM-CTR, respectively. This work is the fastest implementation of CTR mode on ARMv8 architecture to the best of our knowledge.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Cryptographic Implementations and Security · Chaos-based Image/Signal Encryption · Coding theory and cryptography
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Department of Financial Information Security, Kookmin University, Seoul 02707, Korea
Funding
National Research Foundation of Korea
References (21)
Show source-provided references
1. Hong, D., Lee, J.K., Kim, D.C., Kwon, D., Ryu, K.H., and Lee, D.G. (2013, January 19–21). LEA: A 128-Bit Block Cipher for Fast Encryption on Common Processors. Proceedings of the 14th International Workshop, WISA 2013, Jeju Island, Korea. Revised Selected Papers.10.1007/978-3-319-05149-9_1 ↗
2. Hong, D., Sung, J., Hong, S., Lim, J., Lee, S., Koo, B.S., Lee, C., Chang, D., Lee, J., and Jeong, K. (2006, January 10–13). HIGHT: A new block cipher suitable for low-resource device. Proceedings of the International Workshop on Cryptographic Hardware and Embedded Systems, Yokohama, Japan.10.1007/11894063_4 ↗
3. Roh, D., Koo, B., Jung, Y., Jeong, I.W., Lee, D.G., and Kwon, D. (2019). Revised Version of Block Cipher CHAM. Information Security and Cryptology—ICISC 2019, Proceedings of the 22nd International Conference, Seoul, Korea, 4–6 December 2019, Springer. Revised Selected Papers.
4. Park, J.H., and Lee, D.H. (2018). FACE: Fast AES CTR mode Encryption Techniques based on the Reuse of Repetitive Data. IACR Trans. Cryptogr. Hardw. Embed. Syst., 469–499.10.46586/tches.v2018.i3.469-499 ↗
5. Kim, K., Choi, S., Kwon, H., Liu, Z., and Seo, H. (2019). FACE–LIGHT: Fast AES–CTR Mode Encryption for Low-End Microcontrollers. Information Security and Cryptology—ICISC 2019, Proceedings of the 22nd International Conference, Seoul, Korea, 4–6 December 2019, Springer. Revised Selected Papers.
6. Kwon, H., An, S., Kim, Y., Kim, H., Choi, S.J., Jang, K., Park, J., Kim, H., Seo, S.C., and Seo, H. (2020). Designing a CHAM Block Cipher on Low-End Microcontrollers for Internet of Things. Electronics, 9.10.3390/electronics9091548 ↗
7. Kim, Y., Kwon, H., An, S., Seo, H., and Seo, S.C. (2020). Efficient Implementation of ARX-Based Block Ciphers on 8-Bit AVR Microcontrollers. Electronics, 8.10.3390/math8101837 ↗
8. Kim, Y., and Seo, S.C. (2020). An Efficient Implementation of AES on 8-Bit AVR-Based Sensor Nodes. Information Security Applications, Springer International Publishing.10.1007/978-3-030-65299-9_21 ↗
9. High Speed Implementation of LEA on ARMv8
10. Secure and Fast Implementation of ARX-Based Block Ciphers Using ASIMD Instructions in ARMv8 Platforms10.1109/ACCESS.2020.3032785 ↗
11. The Simeck Family of Lightweight Block Ciphers
12. The SKINNY Family of Block Ciphers and Its Low-Latency Variant MANTIS
13. (2021, February 02). Arm® A64 Instruction Set Architecture: Armv8, for Armv8-A Architecture Profile. Available online: https://developer.arm.com/docs/ddi0596/c/simd-and-floating-point-instructions-alphabetic-order.
14. ISO (2019). ISO/IEC 29192-2: 2019: Information Security—Lightweight Cryptography—Part 2: Block Ciphers, International Organization for Standardization.
15. ISO (2010). ISO/IEC 18033-3: 2010: Information Technology—Security Techniques—Encryption Algorithms—Part 3: Block Ciphers, International Organization for Standardization.
16. Koo, B., Roh, D., Kim, H., Jung, Y., Lee, D.G., and Kwon, D. (December, January 29). CHAM: A Family of Lightweight Block Ciphers for Resource-Constrained Devices. Proceedings of the International Conference on Information Security and Cryptology (ICISC’17), Seoul, Korea.
17. Beaulieu, R., Shors, D., Smith, J., Treatman-Clark, S., Weeks, B., and Wingers, L. (2015, January 7–11). The SIMON and SPECK lightweight block ciphers. Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA.10.1145/2744769.2747946 ↗
18. Seo, H., Park, T., Heo, S., Seo, G., Bae, B., Hu, Z., Zhou, L., Nogami, Y., Zhu, Y., and Kim, H. (2016). Parallel Implementations of LEA, Revisited. Information Security Applications—WISA 2016, Proceedings of the 17th International Workshop, Jeju Island, Korea, 25–27 August 2016, Springer. Revised Selected Papers.
19. Seo, H., An, K., Kwon, H., Park, T., Hu, Z., and Kim, H. (2018). Parallel Implementations of CHAM. Information Security Applications—WISA 2018, Proceedings of the 19th International Conference, Jeju Island, Korea, 23–25 August 2018, Springer. Revised Selected Papers.
20. Fujii, H., Carvalho Rodrigues, F., and López, J. (2019). Fast AES Implementation Using ARMv8 ASIMD Without Cryptography Extension. Information Security and Cryptology—ICISC 2019, Proceedings of the 22nd International Conference, Seoul, Korea, 4–6 December 2019, Springer. Revised Selected Papers.10.1007/978-3-030-40921-0_5 ↗
21. (2021, February 02). Raspberry Pi 4B Specification. Available online: https://www.raspberrypi.org/products/raspberry-pi-4-model-b/specifications/.