Research on Device Modeling Technique Based on MLP Neural Network for Model Parameter Extraction
Source abstract
Abstract
The parameter extraction of device models is critically important for circuit simulation. The device models in the existing parameter extraction software are physics-based analytical models, or embedded Simulation program with integrated circuit emphasis (SPICE) functions. The programming implementation of physics-based analytical models is tedious and error prone, while it is time consuming to run the device model evaluation for the device model parameter extraction software by calling the SPICE. We propose a novel modeling technique based on a neural network (NN) for the optimal extraction of device model parameters in this paper, and further integrate the NN model into device model parameter extraction software. The technique does not require developers to understand the device model, which enables faster and less error-prone parameter extraction software developing. Furthermore, the NN model improves the extraction speed compared with the embedded SPICE, which expedites the process of parameter extraction. The technique has been verified on the BSIM-SOI model with a multilayer perceptron (MLP) neural network. The training error of the NN model is 4.14%, and the testing error is 5.38%. Experimental results show that the trained NN model obtains an extraction error of less than 6%, and its extraction speed is thousands of times faster than SPICE in device model parameter extraction.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Advancements in Semiconductor Devices and Circuit Design · Thin-Film Transistor Technologies · Integrated Circuits and Semiconductor Failure Analysis
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Institute of Microelectronics of Chinese Academy of Sciences, Beijing 100029, China
University of Chinese Academy of Sciences, Beijing 100049, China
Beijing Key Laboratory of Three-Dimensional and Nanometer Integrated Circuit Design Automation Technology, Beijing 100029, China
Key Laboratory of Microelectronic Devices & Integrated Technology, CAS, Beijing 100029, China
Funding
Research on Modeling, Analysis and Optimization Technologies for ULP Circuit
References (32)
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