PAGE—Practical AES-GCM Encryption for Low-End Microcontrollers
Source abstract
Abstract
An optimized AES (Advanced Encryption Standard) implementation of Galois Counter Mode of operation (GCM) on low-end microcontrollers is presented in this paper. Two optimization methods are applied to proposed implementations. First, the AES counter (CTR) mode of operation is speed-optimized and ensures constant timing. The main idea is replacing expensive AES operations, including AddRound Key, SubBytes, ShiftRows, and MixColumns, into simple look-up table access. Unlike previous works, the look-up table does not require look-up table updates during the entire encryption life-cycle. Second, the core operation of Galois Counter Mode (GCM) is optimized further by using Karatsuba algorithm, compact register utilization, and pre-computed operands. With above optimization techniques, proposed AES-GCM on 8-bit AVR (Alf and Vegard’s RISC processor) architecture from short-term, middle-term to long-term security levels achieved 415, 466, and 477 clock cycles per byte, respectively.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Cryptographic Implementations and Security · Chaos-based Image/Signal Encryption · Security and Verification in Computing
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Division of IT Convergence Engineering, Hansung University, Seoul 02876, Korea
Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China
References (20)
Show source-provided references
1. Hong, D., Lee, J., Kim, D., Kwon, D., Ryu, K.H., and Lee, D. (2013, January 19–21). LEA: A 128-bit block cipher for fast encryption on common processors. Proceedings of the International Workshop on Information Security Applications, Jeju Island, Korea.10.1007/978-3-319-05149-9_1 ↗
2. Hong, D., Sung, J., Hong, S., Lim, J., Lee, S., Koo, B., Lee, C., Chang, D., Lee, J., and Jeong, K. (2006, January 10–13). HIGHT: A new block cipher suitable for low-resource device. Proceedings of the International Workshop on Cryptographic Hardware and Embedded Systems, Yokohama, Japan.10.1007/11894063_4 ↗
3. Beaulieu, R., Treatman-Clark, S., Shors, D., Weeks, B., Smith, J., and Wingers, L. (2015, January 8–12). The SIMON and SPECK lightweight block ciphers. Proceedings of the 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), San Francisco, CA, USA.10.1145/2744769.2747946 ↗
4. Koo, B., Roh, D., Kim, H., Jung, Y., Lee, D., and Kwon, D. (December, January 29). CHAM: A family of lightweight block ciphers for resource-constrained devices. Proceedings of the International Conference on Information Security and Cryptology, Seoul, Korea.
5. Roh, D., Koo, B., Jung, Y., Jeong, I.W., Lee, D.G., Kwon, D., and Kim, W.H. (2019, January 4–6). Revised Version of Block Cipher CHAM. Proceedings of the International Conference on Information Security and Cryptology, Seoul, Korea.10.1007/978-3-030-40921-0_1 ↗
6. Goubin, L. (2001, January 14–16). A sound method for switching between boolean and arithmetic masking. Proceedings of the International Workshop on Cryptographic Hardware and Embedded Systems, Paris, France.10.1007/3-540-44709-1_2 ↗
7. Announcing the advanced encryption standard (AES)
8. McGrew, D., and Viega, J. (2004). The Galois/counter mode of operation (GCM). NIST Mod. Oper. Process, 20, in submission.
9. FACE: Fast AES CTR mode Encryption Techniques based on the Reuse of Repetitive Data10.46586/tches.v2018.i3.469-499 ↗
10. SCA-resistant GCM implementation on 8-Bit AVR microcontrollers10.1109/ACCESS.2019.2930986 ↗
11. Kim, K., Choi, S., Kwon, H., Liu, Z., and Seo, H. (2019, January 4–6). FACE–LIGHT: Fast AES–CTR Mode Encryption for Low-End Microcontrollers. Proceedings of the International Conference on Information Security and Cryptology, Seoul, Korea.10.1007/978-3-030-40921-0_6 ↗
12. López, J., and Dahab, R. (2000, January 10–13). High-speed software multiplication in f2m. Proceedings of the International Conference on Cryptology, Calcutta, India.10.1007/3-540-44495-5_18 ↗
13. Efficient implementation of pairing-based cryptography on a sensor node10.1587/transinf.E92.D.909 ↗
14. Karatsuba–Block-Comb technique for elliptic curve cryptography over binary fields10.1002/sec.1237 ↗
15. Secure GCM implementation on AVR10.1016/j.dam.2016.10.015 ↗
16. Efficient implementation of the Galois Counter Mode using a carry-less multiplier and a fast reduction algorithm10.1016/j.ipl.2010.04.011 ↗
17. Dinu, D., Biryukov, A., Großschädl, J., Khovratovich, D., Le Corre, Y., and Perrin, L. (2015, January 4–6). FELICS–fair evaluation of lightweight cryptographic systems. Proceedings of the NIST Workshop on Lightweight Cryptography, Gaithersburg, MD, USA.
18. Otte, D. (2020, April 29). AVR-crypto-lib. Available online: https://wiki.das-labor.org/w/AVR-Crypto-Lib/en.
19. Compact implementations of ARX-based block ciphers on IoT processors
20. Masking-Based Block Cipher LEA Resistant to Side Channel Attacks