FinFET Design for Tolerance to Statistical Dopant Fluctuations
Source abstract
Abstract
Variations in highly scaled ($L\rm G = \hbox{9}$ nm), undoped-channel FinFET performance, caused by statistical dopant fluctuations (SDFs) in the source/drain (S/D) gradient regions, are systematically investigated using 3-D atomistic device simulations. The impact of SDF on device design optimization is examined and simple design strategies are identified. Variation-tolerant design imposes stringent specifications for S/D lateral abruptness and gate–sidewall spacer thickness, and it poses a tradeoff between performance and variability for body thickness.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Semiconductor materials and devices · Advancements in Semiconductor Devices and Circuit Design · Ferroelectric and Negative Capacitance Devices
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (13)
Show source-provided references
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