STEM: A Scheme for Two-Phase Evaluation of Majority Logic

The switching time of a magnet in a spin-current-based majority gate depends on the input vector combination, and this often restricts the speed of majority-based circuits. To address this issue, this work proposes a novel two-phase scheme to implement majority logic and evaluates it on an all-spin logic (ASL) majority-based logic structures. In Phase 1, the output is initialized to a preset value. Next, in Phase 2, the inputs are evaluated to switch the output magnet to its correct value. The time window for the output to switch in Phase 2 is fixed. Using such a scheme, an n-input AND gate that requires a total of (2n - 1) inputs in the conventional implementation can now be implemented with only (n + 1) inputs. When applied to standard logic functions, it is demonstrated that the proposed method of designing ASL gates is 1.6-3.4× faster and 1.9-6.9× more energy efficient than the conventional method, and for a five-magnet full adder, it is shown that the proposed ASL implementation is 1.5× faster, 2.2× more energy efficient, and provides a 16% improvement in area.