Fabrication of freestanding nanoscale gratings on silicon-on-insulator wafer

We report a bottom-up process for the fabrication of freestanding nanoscale gratings on silicon-on-insulator (SOI) wafer. Freestanding membrane devices suffer deflection due to the residual stress of the buried oxide layer of SOI wafer. The deflection will affect the device shape and result in the fracture problem for devices fabricated on thin silicon membrane. The bottom-up process is developed to overcome the fabrication issue for thin silicon membrane gratings. The silicon handle layer is removed through back wafer etching of silicon, where the buried oxide layer acts as an etch stop layer. The grating structures are then defined on thin silicon device layer by electron beam lithography and generated by fast atom beam etching. The grating structures are finally released in vapor HF to form the freestanding nanoscale gratings. The freestanding linear/circular gratings, 1,500-nm period grating with the grating width of 200- and 850-nm period grating with the grating width of 100 nm, are successfully achieved on 260-nm silicon device layer.