A Novel Approach to Evaluate and Predict the Impact of Randomly Distributed Voids on Junction Temperature for Power Modules

Solder joints play a significant role in modern electronic packaging; however, the presence of process-induced voids within a solder layer remains a crucial concern to the reliability and performance of interconnects. Porosity (i.e., void fraction of solder layer), void size, void location, and void distribution are key factors affecting the thermal characteristics of power modules. A quantitative description regarding the effects of these main factors on junction temperature is yet confirmed, especially for void distributional effect. In this work, a novel descriptor, $S$ value, was presented to analyze the effect of randomly distributed voids with nonuniform size on junction temperature. The proposed $S$ value was calculated to demonstrate the clustering effect of local voids on heat accumulation, and thus, the prediction of thermal hazard zone was achieved accordingly. It was found that a higher upper limit of voids radius would cause a comparable increase in junction temperature, which followed a similar trend of the effect of porosity. Furthermore, an expression consisting of porosity, maximum voids’ size, and maximum $S$ value was confirmed to predict the junction temperature and the corresponding location with less failure rate, which provided a statistical model to evaluate the thermal performance of solder layer.