Low-Frequency-Noise-Based Oxide Trap Profiling in Replacement High-κ/Metal-Gate pMOSFETs
Source abstract
Abstract
Low-frequency noise is studied in planar high-κ/metal-gate (HK/MG) last pMOSFETs in order to assess the impact of a post-HfO2 deposition SF6-plasma or heat-treatment on the oxide trap density and profile. It is shown that the gate oxide quality is improved by lowering the active border trap density for both approaches. At the same time, a detailed analysis of the frequency exponent of the flicker noise spectra reveals that in the case of the SF6-plasma, the reduction of the active border trap density occurs more efficiently deeper in the high-κ layer, while the opposite holds for the annealed devices, i.e., a lower trap density is found closer to the interfacial SiO2 layer.
Source: openalex_inverted_index · Quality: baseline
Research context
OpenAlex topics: Semiconductor materials and devices · Integrated Circuits and Semiconductor Failure Analysis · Advancements in Semiconductor Devices and Circuit Design
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (37)
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