Review—Current Mirror Analysis and Design in CNTFET and CMOS Technology Including Noise Effects
Source abstract
Abstract
In this paper at first we review a procedure that, through the design of a basic current mirror, allows a comparison between CNTFET and MOS technology. For every simulation parameters of merit, such as relative error in reference current replication and small-signal output resistance, are evaluated in order to show the differences between the two considered technologies. Then the analysis is carried out considering also the effects of noise. For reference current of 1 μ A and 10 μ A the output static and dynamic characteristics are better in the case of CNTFET, but for all cases the output noise current is always higher for the CNTFET than for the MOS. The software used is Advanced Design System (ADS) which is compatible with the Verilog A programming language.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Advancements in Semiconductor Devices and Circuit Design · Analog and Mixed-Signal Circuit Design · Semiconductor materials and devices
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
References (32)
Show source-provided references
1. Marani · ECS Trans. · 2009 · 23 · 42910.1149/1.3183748 ↗
2. Gelao · IEEE Trans. Nanotechnol. · 2011 · 10 · 50610.1109/TNANO.2010.2049499 ↗
3. Marani · Current Nanoscience · 2011 · 7 · 24510.2174/157341311794653613 ↗
4. Marani · International Journal of Electronics · 2012 · 99 · 42710.1080/00207217.2011.629223 ↗
5. Marani · Current Nanoscience · 2012 · 8 · 55610.2174/157341312801784230 ↗
6. Marani · Microelectron. J. · 2013 · 44 · 3310.1016/j.mejo.2011.07.012 ↗
7. Marani · ECS J. Solid State Sci. Technol. · 2016 · 5 · M110.1149/2.0151602jss ↗
8. Marani · ECS J. Solid State Sci. Technol. · 2016 · 5 · M3110.1149/2.0121605jss ↗
9. Gelao · Current Nanoscience · 2015 · 11 · 51510.2174/1573413711666150320231414 ↗
10. Gelao · Current Nanoscience · 2015 · 11 · 77010.2174/1573413711666150624170310 ↗
11. Marani · ECS J. Solid State Sci. Technol. · 2016 · 5 · M3810.1149/2.0241606jss ↗
12. Marani · ECS J. Solid State Sci. Technol. · 2016 · 5 · M11810.1149/2.0161610jss ↗
13. Datta · 1995
14. Marani · ECS J. Solid State Sci. Technol. · 2017 · 6 · M6010.1149/2.0261705jss ↗
15. Marani · ECS J. Solid State Sci. Technol. · 2018 · 7 · M10810.1149/2.0281806jss ↗
16. Perri · 2016
17. Marani · ECS J. Solid State Sci. Technol. · 2017 · 6 · M118
18. Verilog-AMS language reference manual · 2014
19. Van der Ziel · 1986
20. Landauer · 2012
21. Landauer · 2012
22. Hooge · IEEE Trans. Electron Devices · 1994 · 41 · 192610.1109/16.333808 ↗
23. Marani · ECS J. Solid State Sci. Technol. · 2022 · 11
24. Marani · Current Nanoscience · 2019 · 15 · 47110.2174/1573413714666181009125058 ↗
25. Marani · International Journal of Nanoscience and Nanotechnology · 2021 · 17 · 33
26. Marani · International Journal of Nanoscience and Nanotechnology · 2021 · 17 · 121
27. Marani · International Journal of Emerging Technology and Advanced Engineering · 2021 · 11 · 1310.46338/ijetae0721_03 ↗
28. Marani · ECS J. Solid State Sci. Technol. · 2020 · 9 · 02100410.1149/2162-8777/ab69b2 ↗
29. Marani · ECS J. Solid State Sci. Technol. · 2020 · 9
30. Gelao · ECS J. Solid State Sci. Technol. · 2021 · 1010.1149/2162-8777/ac08df ↗
31. Lee · IEEE Trans. Electron Devices · 2015 · 62 · 306110.1109/TED.2015.2457453 ↗
32. Lee · IEEE Trans. Electron Devices · 2015 · 62 · 307010.1109/TED.2015.2457424 ↗