5-bit/cell Characteristics using mixed program/erase mechanism in recessed channel non-volatile memory cells

A device structure formed in a recess region was proposed for used in 5-bit/cell non-volatile memory technology and the device characteristics were investigated. The memory cells were designed with a common control gate and source line to result in high memory density. The proposed memory cell has a nitride layer formed on the vertical surface of the recessed channel region to form a charge storage node. Operation at 4-bit/cell was achieved by using a channel hot electron injection (CHEI) method. Furthermore, we achieve one more bit at the same cell by utilizing a GIDL current controlled by FN tunneling in the source and drain region overlapped by the gate. This additional capacity is obtained without programming disturbance between storage nodes.