Synaptic Characteristics and Vector‐Matrix Multiplication Operation in Highly Uniform and Cost‐Effective Four‐Layer Vertical RRAM Array
Source abstract
Abstract
Abstract This study implements a highly uniform 3D vertically stack resistive random‐access memory (VRRAM) with a four‐layer contact hole structure. The fabrication process of a four‐layer VRRAM is demonstrated, and its physical and electrical properties are thoroughly examined. X‐ray photoelectron spectroscopy and transmission electron microscopy are employed to analyze the chemical distribution and physical structure of the VRRAM device. Multilevel capability, reliable endurance (>104 cycles), and retention (104 s) are successfully obtained. Synaptic memory plasticity, such as spike time‐dependent plasticity, spike rate‐dependent plasticity, excitatory post‐synaptic current, paired‐pulse facilitation, and long‐term potentiation and depression is presented. Finally, the vector‐matrix multiplication (VMM) operation is conducted on a 4 × 12 VRRAM array, according to the low resistance state ratio. It is ascertained that the accuracy drop, which can occur due to VMM error, can be limited to a decrease of less than 0.44% point. Utilizing the high‐density, multilevel, and biological characteristics of VRRAM, it is possible to implement high‐performance neuromorphic systems that require densely integrated synaptic devices.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Advanced Memory and Neural Computing · Ferroelectric and Negative Capacitance Devices · Neuroscience and Neural Engineering
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Division of Electronics and Electrical Engineering Dongguk University Seoul 04620 Republic of Korea
Department of Electrical and Computer Engineering and Inter‐university Semiconductor Research Center (ISRC) Seoul National University Seoul 08826 Republic of Korea
School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA 30332 USA
School of Electrical and Computer Engineering University of Seoul Seoul 02504 Republic of Korea
Funding
National Research Foundation of Korea
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