A State‐of‐the‐Art Review of Through‐Silicon Vias : Filling Materials, Filling Processes, Performance, and Integration
Source abstract
Abstract
Through‐silicon via (TSV) technology realizes high‐density interconnections within and between different dies (chips) by vertically drilling holes in silicon and filling them with various conductive materials. It is an effective way to achieve miniaturization, lightweight, and multi‐functionality in post‐Moore microelectronics. In this review, the process optimization in TSV preparation, various filling techniques, and different filler materials are comprehensively summarized and discussed. It also delves into the characterization and reliability analysis of TSV performance under multi‐physical fields of mechanical, thermal, and electrical. Moreover, the review explores the challenges and solutions for TSVs in regards of integration/packaging and cost aspects. This review can be used to understand the latest research progresses and applications of TSVs, and provide reference and guidance for future research and applications for advanced TSV technology.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: 3D IC and TSV technologies · Electronic Packaging and Soldering Technologies · Semiconductor materials and interfaces
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Ministry of Education Key Laboratory of Micro/Nano Systems for Aerospace Key Laboratory of Micro‐ and Nano‐Electro‐Mechanical Systems of Shaanxi Province School of Mechanical Engineering Northwestern Polytechnical University Xi'an 710072 China
Centre for Nanofibers and Nanotechnology National University of Singapore Singapore 117576 Singapore
Funding
Fundamental Research Funds for the Central Universities
References (100+)
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