journal article·2012Open access

Vapor Deposition of Highly Conformal Copper Seed Layers for Plating Through-Silicon Vias (TSVs)

Yeung Au, Qing Min Wang, Huazhi Li, Jean-Sebastien M. Lehn, Deo V. Shenai, Roy G. Gordon

Abstract

Through-silicon vias (TSV) will speed up interconnections between chips. Manufacturable and cost-effective TSVs will allow faster computer systems. In this paper, we report the successful formation of seed layers for plating copper TSVs with aspect ratios greater than 25:1. Following the rapid atomic layer deposition (ALD) of a conformal insulating layer of silica inside the silicon vias, manganese nitride (Mn 4 N) is deposited conformally on the silica surface by chemical vapor deposition (CVD). Mn 4 N forms an effective copper diffusion barrier and provides strong adhesion between the silica and the subsequently-deposited copper. Conformal copper or copper-manganese alloy films are then deposited by an iodine-catalyzed direct-liquid-injection (DLI) CVD process. Diffusion of manganese during post-deposition annealing further enhances the barrier and adhesion properties at the copper/dielectric interface.
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Research context

OpenAlex topics: Copper Interconnects and Reliability · Semiconductor materials and devices · Semiconductor materials and interfaces

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References (18)

Show source-provided references
1. Beyne E. , Proceedings of the IEEE International Interconect Technology Conference (IITC) IEEE, 1 (2006).
2. 10.1109/5.92964610.1109/5.929646 ↗
3. Van Olmen J. Mercha A. Katti G. Huyghebaert C. Van Aelst J. Seppala E. Chao Z. Armini S. Vaes J. Teixeira R. C. Van Cauwenberghe M. Verdonck P. Verhemeldonck K. Jourdain A. Ruythooren W. de Potter de ten Broeck M. Opdebeeck A. Chiarella T. Parvais B. Debusschere I. Hoffmann T. Y. De Wachter B. Dehaene W. Stucchi M. Rakowski M. Soussan P. Cartuyvels R. Beyne E. Biesemans S. Swinnen B. , IEDM Tech. Dig., 603 (2011).
4. The International Technology Roadmap for Semiconductors (2009).
5. 10.1149/1.351843910.1149/1.3518439 ↗
6. 10.1126/science.107355210.1126/science.1073552 ↗
7. 10.1149/1.355669910.1149/1.3556699 ↗
8. 10.1149/1.181459410.1149/1.1814594 ↗
9. 10.1063/1.158915710.1063/1.1589157 ↗
10. Andideh E. Blaine J. Block C. Jin B. Scherban T. Sun B. , Proc. IEEE 2001 Int. Interconnect Technology Conf., 257 (2001).10.1109/IITC.2001.930077 ↗
11. 10.1149/1.336479910.1149/1.3364799 ↗
12. 10.1021/cm902744710.1021/cm9027447 ↗
13. 10.1021/cm990805+10.1021/cm990805+ ↗
14. 10.1063/1.153294210.1063/1.1532942 ↗
15. Gordon R. G. Kim H. Au Y. Wang H. Bhandari H. B. Liu Y. Lee D. K. Lin Y. , Advanced Metallization Conference 2008 XXIV, 321 (2009).
16. Iijima J. Haneda M. Koike J. , IEEE Int. Interconnect Technol. Conf., Proc., 155 (2006);10.1109/IITC.2006.1648675 ↗
17. 10.1063/1.199375910.1063/1.1993759 ↗
18. 10.1149/1.233863210.1149/1.2338632 ↗