Experimental considerations and applications for time-resolved impedance on silicon-anode battery systems
Source abstract
Abstract
Abstract Dynamic electrochemical impedance spectroscopy (dEIS) utilizes a superimposed multi-sinusoidal waveform and enables temporally resolved investigations on various electrochemical processes; however, the signal-to-noise ratio must be maximized while retaining linearity and stationarity within the system. In the present work, we probe the impact of the waveform’s total amplitude as well as the waveform and phase profiles. The equal amplitude multi-sinusoidal waveform with 35 mV total amplitude (<1 mV per frequency) and random phase profile exhibits the lowest impedance noise. This input signal is sufficient in avoiding the high frequency signal attenuation from the potentiostat’s low-pass filter. Additionally, we demonstrate the optimized dEIS waveform’s utility in investigating surface passivation within thin-film and composite silicon (Si) anodes. Within a two-electrode Si-lithium metal coin cell, the charge transfer resistance ( R CT ) associated with alloying kinetics dominates the overall impedance. R CT increases with state of charge indicating a kinetic bottleneck at higher lithiation states. To explore this further, we utilize a three-electrode Si-LiNi 0.8 Mn 0.1 Co 0.1 O 2 pouch cell to deconvolute the Si impedance contributions. The evolution of the solid electrolyte interphase (SEI) and charge transfer resistances correlate to specific Li–Si alloy phases. We attribute this to the influence of Si particle volume expansion on SEI instabilities and a kinetic bottleneck at higher lithiation states.
Source: crossref · Quality: baseline
Research context
OpenAlex topics: Advancements in Battery Materials · Advanced Battery Materials and Technologies · Advanced Battery Technologies Research
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
Affiliations
Oak Ridge National Laboratory
The University of Tennessee Knoxville
Funding
Science Undergraduate Laboratory Internships · Silicon Consortium Project
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