Study of electromigration-induced formation of discrete voids in flip-chip solder joints by in-situ 3D laminography observation and finite-element modeling
Source abstract
Abstract
Abstract In the microelectronics industry the flip-chip (FC) technology is broadly used to enhance the packaging density. However, the small size and the unique geometry of the FC solder joints induce the electromigration (EM) reliability issue. In this study, a pair of lead-free solder joints (SAC1205) was EM tested by a current of 7.5 × 103 A/cm2. During the tests, X-ray laminography was applied to observe the microstructure evolution in-situ. Laminography enables the non-destructive observation of the bump microstructure and allows for a quantitative three-dimensional (3D) analysis. After EM testing for 650 h, a new EM failure mechanism was found, differing from the two well-known models, the pancake void propagation and the under-bump-metallization dissolution. Here, a few pre-existing small voids grew and simultaneously many new voids formed and grew over the entire EM testing period. Most of the nucleating voids were distributed in the current crowding region, a few also located in the low-current-density region. As the testing time increased, voids increasingly coalesced with each other, forming a porous network which occupied a large part of the interface area and caused the EM failure. A finite-element (FE) method was then applied to analyze the interplay between the microstructure evolution and current density redistribution. A series of 3D FE models was built based on the laminography images for the different testing stages. The current density distribution from the FE analysis indicates that the formation of discrete voids did not affect the global current density distribution until a major coalescence of the voids occurred. The relieving of the global current crowding in the pancake void model was not found in this new EM failure mechanism. It was the local current crowding around individual void found in the new mechanism that is held responsible for the EM retardation.
Source: openaire · Quality: candidate unverified · Source record ↗
Research context
OpenAlex topics: Electronic Packaging and Soldering Technologies · 3D IC and TSV technologies · Advancements in Photolithography Techniques
SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.
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