journal article·2004-02

Silicon Nanoelectronics and Beyond

Paolo A. Gargini

Publisher page

Abstract

No abstract is available for this record. The assistant can identify its topic from the title, but cannot infer the study’s results.

Source: Not provided · Quality: missing

Research context

OpenAlex topics: Semiconductor materials and devices · Advancements in Semiconductor Devices and Circuit Design · Integrated Circuits and Semiconductor Failure Analysis

SciVX discovery tags are terminology-based. OpenAlex topics are source-provided classifications.

References (9)

Show source-provided references
1. Chau R., S. Datta, M. Doczy, J. Kavalieros & M. Metz, 2003. Gate Dielectric Scaling for High-performance CMOS: From SiO2 to High-K, International Workshop on Gate Insulator 2003, Tokyo, Japan.10.1109/IWGI.2003.159198 ↗
2. Dennard R.H. et al., 1974. Design of ion-implanted MOSFETs with very small physical dimensions. IEEE J. Solid-State Circuits SC-9(5).10.1109/JSSC.1974.1050511 ↗
3. Lucovsky G., 2001. Electronic Structure of High-k Transition-metal and Rare-earth Gate Dielectrics for Aggressively-scaled Silicon Devices, International Workshop on Gate Insulator, 3.3, Tokyo.
4. Lilienfeld J.E., 1930. US Patent #1,745,175, Method and Apparatus for Controlling Electric Currents, January 28.
5. Lilienfeld J.E., 1932. US Patent #1,877,140, Amplifier for Electric Currents, September 13.
6. Lilienfeld J.E., 1933. US Patent #1,900,018 Device for Controlling Electric Current, March 7.
7. Shockley W., 1956. The forty-sixth kelvin lecture 'transistor physics.' Proc. IEEE 103(Pt.B, 7).10.1049/pi-b-1.1956.0116 ↗
8. Shockley W., 1984. The path to the conception of the junction transistor. IEEE Trans. Electron Dev. ED-31(11).10.1109/T-ED.1984.21749 ↗
9. Zhirnov V.V., R.K. Cavin, III, J.A. Hutchby & G.I. Bourianoff, 2003. Limits to binary logic switch scaling – a Gedanken model. Proc. IEEE 91(11).10.1109/JPROC.2003.818324 ↗