Effect of emitter deposition temperature on surface passivation in hot-wire chemical vapor deposited silicon heterojunction solar cells

Low substrate temperature (<150 °C) during initiation of amorphous silicon emitter deposition by hot-wire chemical vapor deposition is found to be crucial for reaching high open-circuit voltage (V oc ) in an amorphous/crystalline silicon (a-Si/c-Si) heterojunction solar cell. Low-temperature results in immediate a-Si deposition and a smooth interface to the c-Si substrate. The smooth heterojunction leads to effective passivation of the c-Si surface by the a-Si intrinsic layer through a much-reduced interface recombination velocity, and V oc is consistently above 620 mV. We obtain a V oc above 640 mV and a fill factor of 80% on Al-backed p-type Czochralski wafers with emitters deposited at temperatures below 135 °C. Energy conversion efficiencies of 14.8% and 15.7% are obtained on a polished p-type Czochralski silicon wafer and a polished p-type float-zone silicon wafer, respectively.